Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor
Patent
1997-01-27
1998-04-07
Graybill, David
Semiconductor device manufacturing: process
With measuring or testing
Packaging or treatment of packaged semiconductor
438123, 438124, H01L 2156, H01L 2158, H01L 2160, H01L 2166
Patent
active
057364281
ABSTRACT:
A process for manufacturing semiconductor device including a plurality of leads respectively made up of an inner lead and an outer lead, a semiconductor chip electrically connected to the inner leads, and a package encapsulating at least the inner leads of the leads and the semiconductor chip so that the outer leads extend outwardly of the package. The package has an upper part and a lower part which have mutually different sizes such that a stepped part is formed between the upper and lower parts by the different sizes, and each of the outer leads have a wide part which is wider than other parts of the outer lead extending outwardly of the package only within the stepped part of the package.
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Kasai Junichi
Mashiko Takashi
Saigo Yukio
Sakuma Masao
Takenaka Masashi
Fujitsu Automation Limited
Fujitsu Limited
Graybill David
Kyushu Fujitsu Electronics Limited
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