Process for manufacturing a multi-drain electronic power...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE21337

Reexamination Certificate

active

07838927

ABSTRACT:
A process manufactures a multi-drain power electronic device on a semiconductor substrate of a first conductivity type and includes: forming a first semiconductor layer of the first conductivity type on the substrate, forming a second semiconductor layer of a second conductivity type on the first semiconductor layer, forming, in the second semiconductor layer, a first plurality of implanted regions of the first conductivity type using a first implant dose, forming, above the second semiconductor layer, a superficial semiconductor layer of the first conductivity type, forming in the surface semiconductor layer body regions of the second conductivity type, thermally diffusing the implanted regions to form a plurality of electrically continuous implanted column regions along the second semiconductor layer, the plurality of implanted column regions delimiting a plurality of column regions of the second conductivity type aligned with the body regions.

REFERENCES:
patent: 2003/0148559 (2003-08-01), Onishi et al.
patent: 2006/0180857 (2006-08-01), Loechelt et al.
patent: 2007/0001194 (2007-01-01), Ono et al.
Saggio, M. et al., “MDmesh: innovative technology for high voltage PowerMOSFETs,” Proceedings of the International Symposium on Power Semiconductor Devices and ICS, New York, NY, May 22, 2000, pp. 65-68.
Onishi, Y. et al., “24mOhm.cm2 680V Silicon Superjunction MOSFET,” Proceedings of the 14th International Symposium on Power Semiconductor Devices and ICS, Santa Fe, NM, Jun. 4-7, 2002, pp. 241-244.

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