Process for manufacturing a magnetic bubble memory chip

Details Process for manufacturing a magnetic bubble memory chip Process for manufacturing a magnetic bubble memory chip

1985-02-28

1986-04-01

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156646, 156653, 156655, 156657, 1566591, 156668, 204192E, 365 15, 427130, 427131, B44C 122, B29C 1708, B05D 512, G11C 1908

Patent

active

045796246

ABSTRACT:
A process for manufacturing a dual spacing type magnetic bubble memory chip having a thin garnet film, on which a first area is provided with minor loop transmission lines for memorizing bubble information and a second area is provided with major transmission lines for recording or reading out the bubble information. The process comprises forming a first insulative layer (SiO.sub.2) on the garnet film over the first and second areas, forming conductive patterns on the SiO.sub.2 layer, coating the SiO.sub.2 layer and conductive patterns with a second insulative layer of resin (PLOS) and thermosetting the coated insulative layer, removing by etching part of the SiO.sub.2 and PLOS layers, which exist on the first area, forming a third insulative layer (SiO.sub.2) over the whole surface including the first and second areas, and forming the minor loop transmission lines and the major transmission lines on the third insulative layer.

REFERENCES:
IEEE Transactions on Magnetics, vol. MAG-20, No. 5, Sep. 1984, Design and Fabrication of a 4 Mbit Bubble Memory Chip with 4 .mu.m Period Permalloy, Propagation Tracks, T. Majima et al., pp. 1066-1071.

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