Process for manufacturing a large-scale integration MOS...

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – By application of corpuscular or electromagnetic radiation

Reexamination Certificate

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C257SE23114, C257SE21347, C257SE21475, C257SE21482

Reexamination Certificate

active

08030192

ABSTRACT:
A process for manufacturing a MOS device and the MOS device manufactured thereby are disclosed. The process includes in a semiconductor layer forming a gate structure above the semiconductor layer; forming a first doped region within a first surface portion of the semiconductor layer; and irradiating the first doped region with electromagnetic radiation, to carry out annealing thereof. Prior to the irradiating step, a dielectric mirror is formed above a second surface portion of the semiconductor layer. The dielectric mirror, which may be of the Bragg-reflector type, reflects at least in part the electromagnetic radiation, and protects underlying regions from the electromagnetic radiation.

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patent: 5981343 (1999-11-01), Magri et al.
patent: 6475888 (2002-11-01), Sohn
patent: 6844250 (2005-01-01), Wang et al.
patent: 2003/0027412 (2003-02-01), Chen et al.
patent: 2003/0123829 (2003-07-01), Taylor
patent: 2003/0146458 (2003-08-01), Horiuchi et al.
patent: 0902481 (1999-03-01), None
patent: 1450411 (2004-08-01), None
European Search Report, EP05425836, Jul. 3, 2006.

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