Process for manufacture of integrated circuit device using...

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Reexamination Certificate

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C430S320000, C430S330000, C430S322000, C430S317000, C430S272100

Reexamination Certificate

active

06333141

ABSTRACT:

FIELD OF THE INVENTION
The invention relates generally to a process for manufacturing an integrated circuit device. More specifically, the invention relates to the use of three dimensional polymers to create an insulative porous matrix material.
BACKGROUND OF THE INVENTION
There is a continuing desire in the microelectronics industry to increase the circuit density in multilevel integrated circuit devices e.g., memory and logic chips, thereby increasing their performance and reducing their cost. In order to accomplish this goal, there is a desire to reduce the minimum feature size on the chip e.g., circuit linewidth, and also to decrease the dielectric constant of the interposed dielectric material to enable closer spacing of circuit lines without increase in crosstalk and capacitive coupling. Further, there is a desire to reduce the dielectric constant of the dielectric materials such as utilized in the back end of the line (BEOL) portion of integrated circuit devices, which contain input/output circuitry, to reduce the requisite drive current and power consumption for the device. The present dielectric is silicon dioxide which has a dielectric constant of about 4.0. This material has the requisite mechanical and thermal properties to withstand processing operations and thermal cycling associated with semiconductor manufacturing. However, it is desired that dielectric materials for future integrated circuit devices exhibit a lower dielectric constant (e.g., <3.0) than exhibited by current silicon dioxide.
It is therefore an object of the present invention to provide an improved integrated circuit device comprising an improved dielectric material.
Other objects and advantages of the invention will be apparent from the following disclosure.
SUMMARY OF THE INVENTION
The present invention relates to a process for forming an integrated circuit device comprising (i) a substrate; (ii) interconnecting metallic circuit lines positioned on the substrate and (iii) a dielectric material positioned contiguous to the circuit lines (over and/or between the circuit lines). The dielectric material comprises a porous organic polysilica formed by the process of the present invention. Preferably, the dielectric material has pore sizes less than 500 Å.
A more thorough disclosure of the present invention is presented in the detailed description which follows and from the accompanying drawings.


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