Process for managing system stacks in microcontrollers,...

Details Process for managing system stacks in microcontrollers,... Process for managing system stacks in microcontrollers,...

2007-05-15

2007-05-15

Thai, Tuan V. (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S100000, C711S154000, C712S244000

Reexamination Certificate

active

10623146

ABSTRACT:
In order to manage, in the interrupt stage, a memory stack associated with a microcontroller according to a Program Counter signal and to a Condition Code Register signal that can be contained in respective registers, a first part of memory stack is provided which comprises a register for the Program Counter signal, and a second part of memory stack consisting of a bank of memory elements equal in number to the number of bits of the Condition Code Register signal for the number of the interrupts of the microcontroller. The two parts of stack are made to function in parallel by respective stack-pointer signals.

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patent: WO 99/09469 (1999-02-01), None

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