Process for making doped polysilicon layers on sidewalls

Details Process for making doped polysilicon layers on sidewalls Process for making doped polysilicon layers on sidewalls

1996-11-15

1998-06-02

Powell, William

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

216 62, 438712, 438734, 438304, H01L 2100

Patent

active

057599203

ABSTRACT:
Method for creating a doped polysilicon layer of accurate shape on a sidewall of a semiconductor structure. According to the present method, a doped polysilicon film covering at least part of said semiconductor structure and of said sidewall is formed. This polysilicon film then undergoes a reactive ion etching (RIE) process providing for a high etch rate of said polysilicon film to approximately define the shape of the polysilicon layer on said sidewall. Then, said polysilicon film undergoes a second reactive ion etching process. This second reactive ion etching process is a low polysilicon etch rate process such that non-uniformities of the surface of said polysilicon film are removed by sputtering.

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W. Hwang et al., "Dense SRAM Cell Structure for 16 MB SRAM Chip and Beyond" IBM Technical Disclosure Bulletin, vol. 33, No. 9, Feb., 1991, pp. 276-278 .

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