Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-04-02
2001-11-27
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C427S250000, C427S255290, C427S294000, C427S576000, C118S500000, C118S500000, C118S728000, C118S729000
Reexamination Certificate
active
06323129
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor device manufacturing procedures and, in particular, to manufacturing procedures that optimize semiconductor substrate processing equipment performance.
2. Description of the Related Art
Semiconductor device manufacturing often involves the processing of a semiconductor substrate (e.g. a silicon wafer) through a series of steps, including the implantation of dopant atoms into the substrate, the formation of insulating and conducting layers on the substrate and the subsequent patterning of the layers via lithography and etching techniques. Cost effective semiconductor device manufacturing requires that both the design of the equipment used to process the semiconductor substrate in each step and the manufacturing procedures employed to operate such equipment be optimized in terms of equipment throughput, non-generation of equipment particulates and process uniformity.
For certain types of equipment and, in particular , single wafer Chemical Vapor Deposition (CVD) chambers and single wafer plasma etch chambers, process uniformity (such as wafer-to-wafer etch rate uniformity and layer deposition rate uniformity) can be degraded if the equipment is not in a proper preconditioned state upon the onset of processing. Furthermore, excessive particulate generation . from sources within the equipment can result in malformed patterned layers and inoperable devices, and may lead to other undesirable consequences. While intrusive equipment maintenance procedures can be employed to decrease particle levels therein, these procedures consume valuable equipment time that would otherwise be available for semiconductor substrate processing and, therefore, reduce equipment throughput.
Cycled purge processes designed to reduce particle/contaminant levels in Low Pressure Chemical Vapor Deposition (LPCVD) furnace equipment are known in the art. See U.S. Pat. 5,728,602 to Bellows et al., which is hereby fully incorporated by reference. Conventional cycled purge processes are, however, targeted solely at reducing particle/contaminant levels and do not provide for maintaining the equipment chamber and associated hardware in a proper preconditioned state.
There is, therefore., still a need in the field for a process that maintains a semiconductor substrate layer deposition equipment chamber in a proper preconditioned state, reduces particle levels, and improves equipment throughput by prolonging the time between intrusive maintenance procedures.
SUMMARY OF THE INVENTION
The present invention provides a process for maintaining a semiconductor substrate layer deposition equipment chamber in a preconditioned and low particulate state between successive layer depositions. By maintaining the equipment chamber in the preconditioned and low particulate state, the frequency of intrusive maintenance procedures, and thus the resultant equipment chamber downtime, is reduced.
Processes in accordance with the present invention include a first step of determining that an equipment chamber has been in an idle state for more than a first predetermined time period (e.g. five minutes). Upon such a determination, a second step of reducing the equipment chamber pressure to its base pressure follows. The second step occurs in the absence of gas flow, while simultaneously maintaining the equipment chamber at a first predetermined temperature. The equipment chamber can be, for example, a titanium-nitride (TiN), tungsten (W), or tetraethylorthosilicate (TEOS) based oxide layer deposition equipment chamber. In a third step, the equipment chamber is then maintained at a first predetermined pressure that is greater than the base pressure and at a second predetermined temperature for a second predetermined time period. During the third step, an inert gas, such as helium, argon, nitrogen, hydrogen or mixtures thereof, is discharged through the equipment chamber at a first predetermined inert gas flow rate. The first predetermined pressure, the second predetermined time period and the first predetermined inert gas flow rate are preselected to insure adequate and thorough heating (i.e. preconditioning) of the equipment chamber and any associated hardware at a given second predetermined temperature. A typical range of the first predetermined pressure is from 2 Torr to 4 Torr, while that of the second predetermined time period is from 240 seconds to 360 seconds, and that of the first predetermined inert gas flow rate is from 400 sccm to 600 sccm. In a fourth step, the equipment chamber is then purged with an inert gas, such as helium, argon, nitrogen, hydrogen or mixtures thereof, at a second predetermined inert gas flow rate for a third predetermined time period while the equipment chamber is maintained at a third predetermined temperature. The second predetermined inert gas flow rate is greater than the first predetermined inert gas flow rate, and the third predetermined temperature is suitable for the commencement of a subsequent semiconductor substrate layer deposition process. The third predetermined time period and the second predetermined inert gas flow rate are selected to provide the dislodgement of particulates from within the equipment chamber and any associated hardware. A typical range of the second predetermined inert gas flow rates (per particular gas selected) is from 700 sccm to 1000 sccm, while that of the third predetermined time period is from 24 seconds to 36 seconds. The process sequence from the second step of reducing the chamber pressure to base pressure to the fourth step of maintaining the equipment chamber at the second predetermined temperature is subsequently repeated a predetermined number of times, typically 4 to 6 times. Finally, the equipment chamber is returned to the idle state.
It has been determined that the repeated portion of the process sequence helps maintain an equipment chamber in a preconditioned and low particulate state for semiconductor substrate layer deposition. This is because the equipment chamber is repeatedly purged of particulates and is at a suitable temperature for a subsequent semiconductor substrate layer deposition process when it is returned to the idle state. It should be noted that in processes according to the present invention, maintaining the equipment chamber at a “predetermined temperature” includes circumstances where there is a temperature gradient across the equipment chamber and any associated hardware, and the temperature, therefore, is not uniform. For example, the equipment chamber is said to be maintained at a “predetermined temperature” during processes in accordance with the present invention in a situation where a chamber heater is set at a given temperature, resulting in a temperature gradient across the equipment chamber due to uneven heat transfer. Since the temperature and/or temperature gradient within the equipment chamber is a function of other process parameters (e.g. gas flow rate and equipment chamber pressure), each of the three “predetermined” temperatures in processes according to the present invention can be different from, or the same as, any of the remaining two “predetermined” temperatures.
Also provided is a specific process tailored for maintaining a TiN layer deposition equipment chamber (e.g. Applied Materials Endura 5500 CVD TiN layer deposition equipment chamber) and associated chamber showerhead and chamber heater in a preconditioned and low particulate state between successive TiN layer depositions. The steps of the process include first determining that the equipment chamber has been in an idle state for at least 5 minutes, followed by reducing the equipment chamber to a base pressure in the range of 1×10
−6
Torr to 1×10
−8
Torr in the absence of gas flow, while simultaneously maintaining the associated chamber heater at a temperature in the range of 445° C. to 455° C. The temperature of the associated chamber heater then continues to be maintained for 240 seconds to 360 seconds, while the equipment chamber i
Berry Renee
National Semiconductor Corporation
Nelms David
Stallman & Pollock LLP
LandOfFree
Process for maintaining a semiconductor substrate layer... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Process for maintaining a semiconductor substrate layer..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for maintaining a semiconductor substrate layer... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2613634