Process for low k dielectric plasma etching with high...

Details Process for low k dielectric plasma etching with high... Process for low k dielectric plasma etching with high...

2006-09-26

2006-09-26

Norton, Nadine G. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S709000, C438S717000, C438S725000

Reexamination Certificate

active

07112534

ABSTRACT:
A method of forming a microelectronic structure and its associated structures is described. That method comprises forming and patterning a deep uv resist layer on a substrate, etching the substrate in a plasma generated from a gas comprising a carbon to fluorine ratio from about 1:1 to about 2:3 to form substantially vertical sidewalls in the deep uv resist layer.

REFERENCES:
patent: 6080680 (2000-06-01), Lee et al.
patent: 6730454 (2004-05-01), Pfeiffer et al.
patent: 6833325 (2004-12-01), Huang et al.
patent: 6869542 (2005-03-01), Desphande et al.
patent: 6967171 (2005-11-01), Fujimoto et al.

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