Process for laminating a dielectric layer onto a semiconductor

Details Process for laminating a dielectric layer onto a semiconductor Process for laminating a dielectric layer onto a semiconductor

2006-01-24

2006-01-24

Nguyen, Ha (Department: 2812)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

C438S066000, C438S099000, C438S149000, C438S151000, C438S591000, C438S758000

Reexamination Certificate

active

06989336

ABSTRACT:
This invention relates to processes useful for fabricating electronic devices, more particularly to a process for laminating a layer of dielectric material onto a semiconductor.

REFERENCES:
patent: 6403396 (2002-06-01), Gudesen et al.
patent: 6468841 (2002-10-01), Muramatsu et al.
patent: 6555411 (2003-04-01), Bao et al.
patent: 6596569 (2003-07-01), Bao et al.
patent: 2002/0076575 (2002-06-01), Yang et al.
patent: 2002/0127877 (2002-09-01), Shibata et al.
patent: 2003/0034497 (2003-02-01), Yamazaki et al.
patent: 2003/0207545 (2003-11-01), Yasukawa
patent: 2004/0110395 (2004-06-01), Ueda et al.
Scott Miller et. al., Direct Printing of Polymer Microstructures on Flat and Spherical Surfaces Using a Letterpress Technique, Journal of Vacuum Science and Technology B, 2002, pp. 2320-2327, vol. 20.
Dawen Wang et. al., Nanometer Scale Patterning and Pattern Transfer on Amorphous SI, Crystalline SI, and SIO2 Surfaces Using Self-Assembled Monolayers, Appl. Phys. Lett., 1997, pp. 1593-1595, vol. 70.
C.J. Drury, et al., “Low-cost all-polymer integrated circuits”, Appl. Phys. Letter. (1998), pp. 108-110, vol. 73, No. 1, Netherlands.
V. Podzorov, et al., “Field-effect transistors on rubrene single crystals with parylene gate insulator”, Applied Physics Letters, (2003), pp. 1739-1741, vol. 82, No. 11, New Jersey.

Affiliated with

Also associated with

Rating

Process for laminating a dielectric layer onto a semiconductor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for laminating a dielectric layer onto a semiconductor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for laminating a dielectric layer onto a semiconductor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3571247