Boots – shoes – and leggings
Patent
1985-07-15
1989-05-02
Shaw, Gareth D.
Boots, shoes, and leggings
G06F 1314, G06F 1516
Patent
active
048273988
ABSTRACT:
In a process for interconnecting microprocessors, a master microprocessor (1) transmits a character. All the slave microprocessors receive it in a register (4). If processing is in progress in the slave (2) for which it is intended, the character is masked until the processing is finished. After the processing, the slave microprocessor (2) recognizes it, removes it from the register (4) and loads this latter with an echo intended for the master microprocessor (1), allowing it to transmit a new character.
REFERENCES:
patent: 3699529 (1972-10-01), Beyers et al.
patent: 4035777 (1977-07-01), Moreton
patent: 4219873 (1980-08-01), Kober et al.
patent: 4365294 (1982-12-01), Stokken
patent: 4368512 (1983-01-01), Kyu et al.
patent: 4396978 (1983-08-01), Hammer et al.
patent: 4449202 (1984-05-01), Knapp et al.
patent: 4456956 (1984-06-01), El-Gohary et al.
patent: 4470113 (1984-09-01), Oura
patent: 4484273 (1984-11-01), Stiffler et al.
IBM Technical Disclosure Bulletin, vol. 16, No. 10, Mar. 1974, pp. 3138 to 139, New York, US; J. W. Vandenberg et al.: "Selective Receive Control for a Terminal".
Electronique & Application Industrielles, No. 255, Jun. 1978, pp. 35-39, Paris, France; J. CI. Mathon: "Unmicro-Ordinateur concu pour la Realisation de Systems Multiprocesseurs".
Eakman Christina M.
Shaw Gareth D.
Societe d'Applications Generales d'Electricite et de Mecanique S
LandOfFree
Process for interconnecting microprocessors does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Process for interconnecting microprocessors, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for interconnecting microprocessors will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-589853