Process for integrating dielectric optical coatings into...

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Physical stress responsive

Reexamination Certificate

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Reexamination Certificate

active

06271052

ABSTRACT:

BACKGROUND OF THE INVENTION
Micro-electromechanical system (MEMS) membranes are used in a number of different optical applications. For example, they can be coated to be reflective to highly reflective and then paired with a stationary mirror to form a tunable Fabry-Perot (FP) cavity/filter. It can also be used to define the end of a laser cavity. By deflecting the membrane, the spectral location of the cavity modes can be controlled.
The MEMS membrane is typically produced by etching features into a layer of material to form the pattern of the membrane. An underlying sacrificial layer is subsequently etched away to produce a suspended structure in a release process. Often the structural layer is silicon and the sacrificial layer is silicon dioxide. The silicon dioxide can be preferentially etched in hydrofluoric acid. The membranes can be constructed from various other material systems. In some cases, alternating layers of high and low index material are used to create a membrane.
Typically, membrane deflection is achieved by applying a voltage between the membrane and a fixed electrode. Electrostatic attraction deflects the membrane in the direction of the fixed electrode as a function of the applied voltage. This effect changes the reflector separation in the FP filter or cavity length in the case of a laser. Movement can also be provided by thermal or other actuation mechanism.
The high reflectivity coatings (R>98%) and/or coatings in which the reflectivity varies as a function of wavelength (e.g., dichroism) require dielectric optical coatings. The optics industry has developed techniques to produce these high performance coatings and has identified a family of materials with well-characterized optical and mechanical properties. These coatings typically include alternating layers of high and low index materials. Candidate materials include silicon dioxide, titanium dioxide and tantalum pentoxide. These coatings are usually quite thick, greater than 3 micrometers (um).
SUMMARY OF THE INVENTION
A challenge in the production of optical MEMS devices that requires dielectric optical coatings is to develop a device design and corresponding fabrication sequence that contemplates the integration of these materials.
The present invention concerns a process for patterning dielectric layers of the type typically found in optical coatings in the context of MEMS membrane manufacturing. More specifically, an etching process, such as dry reactive ion etching (RIE), is employed. A mask layer is then applied to protect the dielectric coating during subsequent processing steps, such as release process for example.
The primary advantage of photolithographic patterning of the dielectric layers in optical MEMS devices is that higher levels of consistency can be achieved in fabrication, such as size and residual stress. Competing techniques such as shadow masking yield lower quality features and are difficult to align. Further, the minimum feature size that can be obtained with shadow masks is limited to ~100 um, depending on the coating system geometry, and they require hard contact with the surface of the wafer, which can lead to damage and/or particulate contamination. Lift-off of dielectric layers has been demonstrated, although this process gets more difficult for thick dielectric layers. Furthermore, optical coatings are typically deposited in an electron-beam evaporator with elevated substrate temperatures (200 C.) and with ion assist. Both of these factors complicate the use of photoresist as a lift-off layer.
Further advantages of the proposed patterning sequence are that the coating can be applied conformally over the surface of the wafer. The deposition systems used for optical coatings generally do not conform to the same standards of cleanliness as semiconductor processing tools. Applying a conformal coating to the surface of a plain wafer allows the material to undergo standard clean processes (RCA, piranha, etc) prior to be processed in other tools. Thus, the risk of contamination can be managed effectively. These cleaning steps can be repeated after the etching of the dielectric film to form the patterned features.
The above and other features of the invention including various novel details of construction and combinations of parts, and other advantages, will now be more particularly described with reference to the accompanying drawings and pointed out in the claims. It will be understood that the particular method and device embodying the invention are shown by way of illustration and not as a limitation of the invention. The principles and features of this invention may be employed in various and numerous embodiments without departing from the scope of the invention.


REFERENCES:
patent: 5963788 (1999-10-01), Barron et al.
patent: 6174820 (2001-01-01), Habermehl et al.
patent: 6178284 (2001-01-01), Bergmann et al.

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