Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2005-05-31
2005-05-31
Deo, Duy-Vu N. (Department: 1765)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S435000, C438S690000, C438S691000
Reexamination Certificate
active
06900112
ABSTRACT:
A process for forming shallow trench isolation region with corner protection layer. A protection layer is formed within the opening that defines the isolation trench as part of the etching mask such that the etching rate of the protection layer is less than the mask layer and the pad insulating layer to the etchant used to remove the mask layer and pad insulating layer. The protection layer is partially removed and left adjacent to the shallow trench isolation region as a corner protection layer after removing the mask layer and pad insulating layer. Thus, the indentation next to the corner of the isolation region is avoided.
REFERENCES:
patent: 5863827 (1999-01-01), Joyner
patent: 5940716 (1999-08-01), Jin et al.
patent: 6358818 (2002-03-01), Wu
patent: 6518145 (2003-02-01), Alsmeier et al.
patent: 6518148 (2003-02-01), Cheng et al.
Huang Chung-Lin
Lin Chi-Hui
Deo Duy-Vu N.
Nanya Technology Corporation
Quintero Law Office
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