Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation
Patent
1996-09-06
1998-05-05
Fourson, George R.
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Recessed oxide by localized oxidation
438702, 438947, H01L 2176
Patent
active
057473773
ABSTRACT:
A process for forming a shallow trench isolation is disclosed. Initially, a gate oxide layer is formed on a substrate, and a silicon nitride, which defines an active area, is then patterned on the gate oxide layer. Next, hemispherical grain silicon is formed on the silicon nitride, the sidewalls of the silicon nitride, and the exposed gate oxide layer. Portions of the gate oxide layer are removed to form oxide islands using the silicon nitride and the hemispherical grain silicon as mask. Thereafter, portions of the substrate are removed using the oxide islands as mask. Finally, the exposed substrate is thermally oxidized to form the field oxide structure of the present invention.
REFERENCES:
patent: 5308786 (1994-05-01), Lur et al.
patent: 5374583 (1994-12-01), Lur et al.
patent: 5393373 (1995-02-01), Jun et al.
patent: 5395790 (1995-03-01), Lur
Fourson George R.
Powerchip Semiconductor Corp.
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