Process for forming opening portion in interlayer insulation...

Details Process for forming opening portion in interlayer insulation... Process for forming opening portion in interlayer insulation...

2009-11-05

2011-11-08

Richards, N Drew (Department: 2895)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S694000, C438S637000, C257S758000

Reexamination Certificate

active

08053369

ABSTRACT:
A manufacturing method for a semiconductor device, including: forming a metallic layer and an interlayer insulation film on a semiconductor substrate sequentially; etching on the interlayer insulation film using fluorine-based etching gas to form an opening portion of a predetermined pattern, reaching the metallic layer; and supplying chlorine-based silane gas and discharging, thus forming a Si film at least on an internal surface of the opening portion without exposure to the atmosphere after the etching.

REFERENCES:
patent: 6551399 (2003-04-01), Sneh et al.
patent: 2007/0093060 (2007-04-01), Tonegawa
patent: 2007/0232075 (2007-10-01), Imada et al.
patent: 2008/0001699 (2008-01-01), Gardner et al.
patent: 2008/0169534 (2008-07-01), Dip et al.
patent: 2009/0014879 (2009-01-01), Park et al.
patent: 2004-356474 (2004-12-01), None
patent: 2006-165189 (2006-06-01), None

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