Process for forming LDD MOS/CMOS structures

Details Process for forming LDD MOS/CMOS structures Process for forming LDD MOS/CMOS structures

1986-01-24

1987-11-03

Hearn, Brian E.

Fishing, trapping, and vermin destroying

432 57, 432 44, H01L 21265

Patent

active

047035510

ABSTRACT:
A process for selectively forming NMOS/PMOS/CMOS integrated circuits and for selectively incorporating any or all of lightly doped drain-source (LDD) regions, sidewall gate oxide structures, and guard band regions.

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Tsang, "Fabrication of High-Performance LDDFET's with Oxide Sidewall Technology", IEEE Journal of Solid-State Circuits, vol. SC-17, No. 2, Apr. 82, pp. 220-226.

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