Process for forming an FET read only memory device

Details Process for forming an FET read only memory device Process for forming an FET read only memory device

1994-02-14

1995-02-28

Nguyen, Viet Q.

Static information storage and retrieval

Systems using particular element

Semiconductive

257377, 257381, 257383, 257385, 437 52, H01L 21265

Patent

active

053943562

ABSTRACT:
A method of producing a ROM device wherein parallel spaced bit line regions are formed in a semiconductor substrate, blanket layers of (1) polysilicon, (2) etch stop material, and (3) polysilicon, are deposited, the layers etched to form orthogonal parallel word lines on the surface of the substrate, a thick insulating layer deposited over the word lines, a resist layer deposited, exposed and developed to define a desired code implant pattern, the exposed areas of the thick layer removed, and the underlie upper polysilicon layer of the bit line removed, and ion implanted into the substrate to form a code implant.

REFERENCES:
patent: 4458407 (1984-07-01), Hoeg, Jr. et al.
patent: 4513494 (1985-04-01), Batra
patent: 4818716 (1989-04-01), Okuyama et al.
patent: 4874715 (1989-10-01), Paterson
patent: 5306657 (1994-04-01), Yang

Affiliated with

Also associated with

Rating

Process for forming an FET read only memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for forming an FET read only memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for forming an FET read only memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-853198