Process for forming a dual damascene structure

Details Process for forming a dual damascene structure Process for forming a dual damascene structure

2006-09-26

2006-09-26

Vinh, Lan (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S706000, C438S720000

Reexamination Certificate

active

07112532

ABSTRACT:
The invention describes a method for forming a dual damascene structure. An etch stop layer (150) is formed on a dielectric layer (140). A second dielectric layer (160) is formed on the etch stop layer (150) and an ARC layer (170) is formed the second dielectric layer. A first trench (185) and a second trench (195) are then simultaneously formed in the first and second dielectric layers (140) and (160) respectively.

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