Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1996-01-05
1999-03-09
Niebling, John F.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438658, 438659, 438660, 438688, 438680, 438632, 438646, H01L 2144
Patent
active
058800239
ABSTRACT:
A method for formation of a wiring layer in a semiconductor device, which includes the steps of: forming a first conductive layer upon a substrate; forming a second conductive layer on the first conductive layer, the second conductive layer having a melting point lower than that of the first conductive layer; and melting (or flowing) the second conductive layer. The first conductive layer is composed of aluminum or an aluminum alloy, and the impurity may be Si or Cu, while the second conductive layer has a melting point lower than that of the first conductive layer by 10.degree. C. or more.
REFERENCES:
patent: 3871067 (1975-03-01), Bogardus et al.
patent: 4062720 (1977-12-01), Alcorn et al.
patent: 4482394 (1984-11-01), Heinecke
patent: 4489482 (1984-12-01), Keyser et al.
patent: 4970176 (1990-11-01), Tracy et al.
patent: 5147819 (1992-09-01), Yu et al.
patent: 5164332 (1992-11-01), Kumar
patent: 5169803 (1992-12-01), Miyakawa
patent: 5171412 (1992-12-01), Talieh et al.
patent: 5179042 (1993-01-01), Mikoshiba et al.
patent: 5236866 (1993-08-01), Yasue
patent: 5283206 (1994-02-01), Sugano
patent: 5300462 (1994-04-01), Kakumu
patent: 5371042 (1994-12-01), Ong
patent: 5409862 (1995-04-01), Wada et al.
patent: 5420069 (1995-05-01), Joshi et al.
patent: 5523259 (1996-06-01), Merchant et al.
patent: 5654232 (1997-08-01), Gardner
patent: 5693564 (1997-12-01), Yu
patent: 5789317 (1998-08-01), Batra et al.
patent: 5798296 (1998-08-01), Fazan et al.
Kondoh et al.; "Interconnection Formation by Simultaneous Copper Doping in Chemical-Vapor-Deposited Aluminum (Aal-Cu CVD)"; IEDM 1993, pp. 277-280.
Gurley Lynne A.
LG Semicon Co., Ldt.
Niebling John F.
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