Process for fabricating silicon channel structures with variable

Details Process for fabricating silicon channel structures with variable Process for fabricating silicon channel structures with variable

1993-11-01

1995-01-31

Fourson, George

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156644, 156651, 1566611, 347 65, H01L 21306

Patent

active

053856350

ABSTRACT:
Three dimensional silicon structures having variable depths such as ink flow channels and reservoirs are fabricated from silicon wafers by a two-step anisotropic etching process from a single side of the wafer. Two different etching masks are formed one on top of the other prior to the initiation of etching with the coarsest mask formed last and used first. Once the coarse anisotropic etching is completed, the coarse etch mask is removed and the finer anisotropic etching is accomplished through the remaining mask. The shape of the mask for the finer anisotropic etching in combination with a predetermined etch time produces a channel having varying depths and widths by controlled undercutting of the mask by the finer anisotropic etching. The preferred embodiment is described using an ink flow directing part of a thermal ink jet printhead where the coarse etching step provides the reservoir and the timed fine etching step provides the ink channels having varying cross-sectional flow areas.

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patent: 5204690 (1993-04-01), Lorenze, Jr. et al.
patent: 5277755 (1994-01-01), O'Neill

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