Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Patent
1996-06-05
1998-06-09
Niebling, John
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
438514, 438528, H01L 21265
Patent
active
057633193
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to the fabrication process of semiconductor devices, and in particular, the present invention relates to the fabrication process of semiconductor devices with very shallowly doped regions.
2. Description of the Prior Art
As the overall dimensions of semiconductor devices are miniaturized and made ever smaller, the formation of very shallowly doped regions, e.g. those less than a quarter-micron in depth, becomes a major limiting factor in the fabrication process for all miniature devices, including but not limited to metal oxide semiconductor field-effect transistors (MOSFET) and complementary metal oxide semiconductor (CMOS) devices.
The method used to make these vital CMOS and MOSFET transistors involves the formation of both n-type and p-type doped regions where n-type doped regions can be formed by the ion implantation of n-type elements in Group V A of the Periodic Table, and p-type doped regions can be formed by the ion implantation of elements in Group III A of the Periodic Table.
Technical difficulties currently hamper the formation of shallowly doped regions. In most semiconductor fabrication processes, the dopant boron is used to form p-type regions, and boron has a very low atomic number (Z=5). Traditional ion implantation techniques pose several problems in implanting low Z dopants. During the ion implantation process, a low Z dopant such as boron tends to channel through the crystalline structure of the substrate and forms a very undesirable, deep implantation profile tail where the concentration and depth of the dopant easily extends beyond the desired channel depth. This inability to control the junction depth seriously degrades device performance. Thus, it is not feasible to use conventional implantation technology to implant a low atomic dopant to form shallowly doped regions for very large scale integrated (VLSI) circuits or ultra large scale integrated (ULSI) circuits. Although there are techniques currently available to minimize the channeling effect, these techniques require additional processing steps and thus result in higher manufacturing costs. A different method for implantation of boron ions is to use low energy ion implantation techniques, but these techniques pose other problems. One problem is that it is difficult to manufacture low energy ion implantation equipment, i.e. equipment generating energy less than 5 Kev. Another problem is that using low energy ion implantation (energy less than 5 KeV) can result in sputtering or deposition where the boron ions fail to penetrate the substrate surface.
Several techniques are currently used to overcome the technical difficulties associated with ion implantation of low z dopants and low energy ion implantation. In one case, the shallow p-region is formed using a heavier ion compound, i.e. BF.sub.2. Due to the higher mass of the compound, the constituent atoms of the BF.sub.2 ion provide a shallower penetration depth for a given ion energy, thus enabling the formation of shallower p-type regions. The BF.sub.2 ions provide another key advantage in that they reduce the channeling effect and thus the associated problems. This improvement is accomplished by the increased crystalline structural damage caused by the heavier fluorine atoms of the ion compound. Furthermore, since fluorine is neither a p-type nor an n-type dopant, the fluorine atoms that are introduced from the BF.sub.2 ions do not directly contribute to the electrical performance of the semiconductor device.
However, the introduction of fluorine generates a new set of problems. Due to their low solubility in silicon, the fluorine atoms tend to migrate, particularly if the substrate is heated. After a BF.sub.2 ion implantation process, any subsequent process which requires elevation of temperature will tend to cause the implanted fluorine to migrate to the silicon surface, i.e. the silicon-oxide interface. In some cases, this migration causes the fluorine to coalesce and form a gap or
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Ling Peiching
Tien Tien
Advanced Materials Engineering
Mulpuri S.
Niebling John
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