Process for fabricating multilayer circuit boards

Details Process for fabricating multilayer circuit boards Process for fabricating multilayer circuit boards

1987-08-26

1988-10-04

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156656, 1566591, 1566611, 156666, 156902, 148 62, 427 97, C23F 102, B44C 122, C03C 1500, C03C 2506

Patent

active

047754443

ABSTRACT:
Printed circuit boards having copper circuit patterns coated with an adhesion promoter (e.g., copper oxide, tin) are subjected to the action of an aqueous chromic acid solution prior to incorporation in a multi-layer board by interposing layers of semi-cured polymeric non-conductive material between the individual boards and laminating the assembly using heat and pressure. The chromic acid treatment serves to improve adhesion between the layers and, in particular, to overcome or minimize the "pink ring" effect which is frequently observed around holes drilled through multilayer boards.

REFERENCES:
patent: 2955974 (1961-10-01), Allen et al.
patent: 3177103 (1965-04-01), Tally et al.
patent: 3198672 (1965-08-01), De Hart
patent: 3240662 (1966-03-01), Smyers et al.
patent: 3374129 (1968-03-01), Boucher
patent: 3481777 (1969-12-01), Spannhake
patent: 3833433 (1974-09-01), Caule
patent: 4075757 (1978-02-01), Malm et al.
patent: 4358479 (1982-11-01), Canestaro et al.
patent: 4409037 (1983-11-01), Landau
patent: 4512818 (1985-04-01), Valayil et al.
patent: 4702793 (1987-10-01), Garlough et al.
patent: 4717439 (1988-01-01), Hajdu et al.

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