Process for fabricating insulation-filled deep trenches in semic

Details Process for fabricating insulation-filled deep trenches in semic Process for fabricating insulation-filled deep trenches in semic

1995-04-19

1999-03-02

Fourson, George

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Total dielectric isolation

438432, H01L 2176

Patent

active

058770658

ABSTRACT:
A method for forming an isolation wall in a silicon semiconductor substrate wherein a trench is etched into the silicon using a hard mask, a layer of silicon dioxide is formed on the side walls of the trench, a filling of polysilicon is placed in the region between the side wall layers, the polysilicon is planarized by etching while the hard mask remains in place, and the hard mask then is stripped from the silicon, permitting field oxide to be grown over the trench region.

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