Process for fabricating electronic circuits based on thin-film t

Details Process for fabricating electronic circuits based on thin-film t Process for fabricating electronic circuits based on thin-film t

1986-06-16

1987-08-25

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

437919, 156652, 156656, 156657, 1566591, 156662, 156607, 350333, 357 4, H01L 21306, B44C 122, C03C 1500, C23F 102

Patent

active

046891161

DESCRIPTION:

BRIEF SUMMARY
Document FR-A-2 533 072 describes a process for fabricating an active matrix display screen in which there is produced a lower wall carrying capacitor plates and thin-film transistors and an upper wall coated with a counter-electrode forming the second plates of the capacitors. The process which is the subject matter of this document is characterised in that, to produce the lower wall, the following operations are carried out: insulative substrate,
photo-etching this first layer to constitute lines and columns of pads forming one of the plates of the eventual capacitors, each pad being joined to an appendix, this first photo-etching leaving also columns of said first conductive material disposed between the columns of pads, to leave lines of the second conductive material extending over the appendixes, the areas of overlap of a line with a column and an appendix defining the source and the drain of a transistor, the grid of the transistor consisting of the part of the line situated between the appendix and the column.
In a variation on this process and in order to improve the contact between the oxide and the aSiH layer, a highly n-doped amorphous silicon layer is deposited after the oxide. The first etching is still effected using the same mask, but affects both the doped silicon layer and the oxide layer. The second photo-etching is not changed.
An object of the present invention is a variation on this process using the doped amorphous silicon additional layer but in which the second photo-etching is slightly modified.
In the prior art document, the doped silicon is attacked after the semiconductor silicon during the second etching. Thus the doped silicon remains only beneath the grid, above the oxide (see FIG. 7b of the main patent).
Although the results obtained with the embodiment described in the prior art document have demonstrated the validity of the process and the benefits of its simplicity, the resulting screens may in some cases feature a few defects resulting from breaks in the columns. These breaks occur when there is used for the initial substrate a "Balzers" type glass covered with a very thin layer of indium-tin oxide. The "natural" fine scratches in these standard substrates (which are not expensive as they are already used in liquid crystal displays) prevent the formation of very fine strips (approximately 20 .mu.m wide) with a yield of 100%. It is therefore necessary either to deposit the transparent and conductive layers onto better quality substrates or to introduce redundancy to compensate for the interrupted columns.
The second solution is used in the present invention.
Redundancy is obtained by slightly modifying the second level mask so that after etching there remains over part of the columns a stack formed by the n-doped silicon layer and the subsequent layers. Should the column be broken, a stack then acts as a conductive bridge between the two parts of it. There results an electrical redundancy in the design of the addressing columns since two conductors are provided in parallel, the second alleviating any defects of the first.
This solution has another advantage: the stack that remains results in optical masking of the transparent column. If the column is not masked it is visible in the same way as a display point. Its appearance depends on the average value of the video voltage during a picture. This effect is a considerable nuisance in white on black display mode, since the eye is highly sensitive to white lines, even if extremely fine. In the opposite mode, black and white, the effect is much less visible since a black line 20 .mu.m wide on a white background is invisible to the eye. Optical masking of the transparent columns is therefore necessary, especially in the first mode, and is perfectly implemented by the present invention.
It will be noted that the improvement in accordance with the invention does not introduce any supplementary operation, since it is merely the design of the second level mask that is slightly modified.
Note also that in the case of very wide bre

REFERENCES:
patent: 4331758 (1982-05-01), Luo
patent: 4332075 (1982-06-01), Ota et al.
patent: 4563806 (1986-01-01), Coissard et al.
R. T. Gallagher, Electronics International, vol. 55, No. 10, Amorphous Silicon Enlarges LCD's ", pp. 94-96, May 19, 1982.

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