Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1998-03-12
1999-08-10
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438255, H01L 2120
Patent
active
059373075
ABSTRACT:
A process of fabricating the storage capacitor of a DRAM memory IC device having increased electrode surface area is disclosed. The hemispherical-grain silicon layer used to effect the area increase does not suffer stripping-off during the process of removal of its native oxide. The prevention of the stripping-off is achieved by the employment of a amorphous silicon layer underlying the hemispherical-grain silicon layer. The amorphous silicon layer improves the adhesiveness of the hemispherical-grain silicon layer, thereby preventing its stripping-off.
REFERENCES:
patent: 5622889 (1997-04-01), Yoo et al.
patent: 5721153 (1998-02-01), Kim et al.
patent: 5726085 (1998-03-01), Crenshaw et al.
patent: 5837580 (1998-11-01), Thakur et al.
patent: 5837581 (1998-11-01), Cheng
patent: 5837582 (1998-11-01), Su
patent: 5854095 (1998-12-01), Kang et al.
patent: 5858852 (1999-01-01), Aiso et al.
patent: 5866455 (1999-02-01), Wu
patent: 5874336 (1999-02-01), Cherng
patent: 5877052 (1999-03-01), Lin et al.
patent: 5885867 (1999-03-01), Shin et al.
Jenq Jason
Wu Der-Yuan
Nguyen Tuan H.
United Microelectronics Corp.
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