Process for fabricating an integrated electronic circuit...

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S619000, C438S624000

Reexamination Certificate

active

10781565

ABSTRACT:
A process for fabricating an integrated electronic circuit comprises the formation of at least one air gap between interconnect elements above only a defined portion of a surface of a substrate, within an interconnect layer. The interconnect layer comprises a sacrificial material and extends beneath an intermediate layer of permeable material. The air gap is formed by removal, through the intermediate layer, of at least part of the sacrificial material by bringing the permeable material into contact with an agent for removing the sacrificial material, to which agent the permeable material is resistant.

REFERENCES:
patent: 5461003 (1995-10-01), Havemann et al.
patent: 6245658 (2001-06-01), Buynoski
patent: 6265321 (2001-07-01), Chooi et al.
patent: 6306754 (2001-10-01), Agarwal
patent: 6509623 (2003-01-01), Zhao
patent: 2002/0028575 (2002-03-01), Besling et al.
patent: 2002/0089060 (2002-07-01), Morisaki et al.
patent: 2002/0090794 (2002-07-01), Chang et al.
patent: 2003/0224591 (2003-12-01), Latchford et al.
patent: 0 872 887 (1998-10-01), None
patent: 2 784 230 (2000-04-01), None
Kang-Yoon Lee et al., “Monte Carlo Simulation of Energy Dissipation in Electron Beam Lithography Including Secondary Electron Generation”, J. Appl. Phys. 67 (12), Jun. 15, 1990, pp. 7560-7567.
Chung-Hui Chen et al., “A Novel Multi-Level Interconnect Scheme With Air As Low K Inter-Metal Dielectric For Ultradeep Submicron Application” Solid-States Electronics 45 (2001), pp. 199-203.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Process for fabricating an integrated electronic circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for fabricating an integrated electronic circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for fabricating an integrated electronic circuit... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3871581

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.