Process for fabricating a self-aligned bipolar transistor

Details Process for fabricating a self-aligned bipolar transistor Process for fabricating a self-aligned bipolar transistor

1986-04-10

1987-10-06

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156646, 156648, 156653, 156657, 1566591, 357 43, 437 26, H01L 2104, H01L 2122, H01L 21306, B44C 122

Patent

active

046981276

ABSTRACT:
Using a single mask pattern on a semiconductor substrate, a doped base contact region adjacent to the surface of the substrate, a buried insulating region below the base contact region, and an insulating layer on the base contact region, and optionally, a metal or metal silicide base-electrode-taking-out layer on the base contact region, are formed, respectively. Doped emitter and intrinsic base regions are formed below the mask pattern. A collector region is defined by the base contact region and the buried insulating layer to be inside thereof, i.e., below the mask pattern. Thus, a bipolar transistor is formed in a size that is essentially necessary, thereby reducing the collector-base capacitance, the base resistance, and the size of the device.

REFERENCES:
patent: 4444620 (1984-04-01), Kovacs et al.
patent: 4584055 (1986-04-01), Kayanuma et al.
patent: 4591398 (1986-05-01), Ouchi et al.

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