Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1995-07-03
1998-04-07
Dutton, Brian
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438270, 438282, 438589, H01L 2100, H01L 2184, H01L 21336, H01L 213205
Patent
active
057364354
ABSTRACT:
A process for fabricating a MOSFET on an SOI substrate includes the formation of an active region (14) isolated by field isolation regions (16, 18) and by an insulating layer (12). A recess (26) is formed in the active region (14) using a masking layer (22) having an opening (24) therein. A gate dielectric layer (32) is formed in the recess (26) and a polycrystalline silicon layer (34) is deposited to overlie the masking layer (22), and to fill the recess (26). A planarization process is carried out to form a gate electrode (36) in the recess (26), and source and drain regions (40, 42) are formed in a self-aligned manner to the gate electrode (36). A channel region (44) resides intermediate to the source and drain regions (40, 42) and directly below the gate electrode (36).
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Ajuria Sergio
Lutze Jeffrey
Poon Stephen
Venkatesan Suresh
Dutton Brian
Meyer George R.
Motorola Inc.
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