Process for etching semiconductor devices

Details Process for etching semiconductor devices Process for etching semiconductor devices

1992-12-23

1994-09-06

Breneman, R. Bruce

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156664, 156666, 156345, H01L 2100

Patent

active

053445252

ABSTRACT:
A process for etching a semiconductor device having a plurality of layers to form a predetermined etched pattern therein is provided. At least one of the layers of the semiconductor device comprise a layer formed of a low reactivity material. A low reactivity material is one which, when chemically reacted with an chemical etchant material, typically in gas phase, at a temperature of up to about 200 degrees C., does not form a substantial amount of volatile by-products from the chemical reaction. The temperature of the low reactivity material layer is therefore elevated, generally in a controllable and uniform manner, to a level which, upon reaction with the chemical etchant material in gas phase, will form a substantial amount of volatile gaseous by-products from the chemical reaction. Then, the semiconductor device is etched with an etchant material to form a predetermined pattern therein. In this way, the chemical etching reaction produces a substantial amount of volatile gaseous by-products. Since a substantial amount of volatile gaseous by-products is formed, the gaseous material can be readily removed from the etching area.

REFERENCES:
patent: 4468284 (1984-08-01), Nelson
patent: 4545851 (1985-01-01), Takada
patent: 4687544 (1987-08-01), Bersin
patent: 4931410 (1990-06-01), Tokunaga et al.
patent: 4971653 (1990-11-01), Powell et al.
"Plasma Etching In Semiconductor Fabrication" ed. by Russ A. Morgan; .COPYRGT.1985; N.Y., N.Y.; pp. 98-99 and 42-43.

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