Process for etching polysilicon layer in formation of integrated

Details Process for etching polysilicon layer in formation of integrated Process for etching polysilicon layer in formation of integrated

1989-06-09

1991-07-09

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437228, 148DIG51, H01L 21465

Patent

active

050305905

ABSTRACT:
The invention comprises an improvement in the process wherein a polysilicon layer, which is formed over a step on an integrated circuit structure and masked with a photoresist, is anisotropically etched to remove the exposed portions of the polysilicon layer leaving residues of polysilicon adjacent to the step and residues of a polymerized silicon/oxide-containing material adjacent the sidewalls of the masked portions of the polysilicon layer. The improvement comprises treating the integrated circuit substrate with a dilute hydroxide solution to remove both the polysilicon residues and the residues of polymerized silicon/oxide-containing material.

REFERENCES:
patent: 4488351 (1984-12-01), Momose
Ghandhi, S. K., VLSI Fabrication Principles, 1983, pp. 488-490.

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