Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate
1998-06-22
2001-11-20
Chung, Phung M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error/fault detection technique
C714S799000
Reexamination Certificate
active
06321361
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a process for detecting errors in a serial link of an integrated circuit and to a device for implementation of the process. The invention relates more particularly to a process and device for detecting errors in a serial link of an integrated circuit, or between two integrated circuits, comprising a parallel-serial and serial-parallel port.
The invention is especially applicable when it is desirable to use gigabit-rate serial links having an error rate that is non-null, for example on the order of 10
−15
to 10
−17
, to produce an internal link to a logic unit which would normally be produced by a parallel link that is not prone to interference. This substitution is motivated by the fact that high-speed serial links have many advantages. For example, high-speed serial links provide high density and ease of connection with an identical passband, and allow a long link, for example up to 10 meters, which is impossible with standard internal logical links.
2. Description of Related Art
In the case where the serial link is a 1-gigabaud serial link, and assuming that two ports of the same type are communicating with one another through the serial link, allowing machines whose error rate in terms of message corruption and calibration loss and/or protocol inconsistency is on the order of 10
−17
to communicate with one another, it will be noted, taking into account the speed of the serial link and the error rate of the machine, that this seemingly low error rate can generate a substantial error and an abnormal operation of the machine every two days.
Integrated circuits comprising interfaces between a parallel bus and a serial bus are known, but in general they do not comprise a device and process for detecting and recovering from errors, since they are based on the principle that the communication does not include any errors involving the serial link, or if it does include any, the detections of errors and recoveries from errors are handled in a higher layer (calibration loss) at the software level.
SUMMARY OF THE INVENTION
Therefore, a first object of the invention is to propose a process that allows the detection of errors and the verification of the proper operation of the communication of a serial link.
This object is achieved due to the fact that the process for detecting errors in an integrated circuit constituting a high-speed serial-parallel communication port between a parallel bus and a serial link, the port comprising, in a sending part, at least one buffer for data to be transmitted issuing from the parallel bus, and in a receiving part, at least one buffer for data to be received, the sending part inserting each message or data set into a frame of control characters that convey information on the messages in question, the sending part coding the characters of the messages at the bit level, the receiving part performing a complete verification of the messages before the message is written into the receiving buffer or buffers, the buffers of the sending and receiving parts being equal in number and used synchronously and cyclically, the process comprising:
a step for on-the-fly consistency checking of the messages at the level of their coding into bits,
a step for on-the-fly consistency checking of the character stream constituting the messages,
a step for on-the-fly checking that the buffers of the sending and receiving parts are being used synchronously and cyclically, and
a step for on-the-fly checking of the data of the messages by calculating the cyclic redundancy check (CRC) code on all the data of each message to be transmitted.
According to another characteristic, the sending part codes the characters of the messages so as to try to have a null direct current component, giving each character a start bit and a stop bit, the step for on-the-fly consistency checking of the messages at the level of their coding into bits being carried out by the receiving part and comprising:
a step for verifying that each character begins with a start bit and ends with a stop bit, and
a step for verifying that the accumulated current imbalance of the codes in the message flow is contained within a predetermined range of values.
According to another characteristic, the messages or data are constituted by so-called normal characters, control characters comprising null characters or idle messages, start-of-frame characters containing information on the format of the messages contained in the frames in question, such as the length and/or the type of the message, end-of-frame characters containing information on the validity of the messages contained in the frames in question and on the identity of the source buffer of the message, and flow control characters (tokens), each of which is associated with a respective receiving buffer and intended to indicate the availability of the buffer in question, the step for on-the-fly consistency checking of the character stream constituting the messages detecting the transformations, as a result of disturbances, of normal characters into control characters and vice versa, the transformations of normal characters into other normal characters being detected by the CRC, or later by an accumulated current imbalance error.
According to another characteristic, the step for on-the-fly checking that the buffers of the sending and receiving parts are always used synchronously and cyclically comprises:
a step for the verification by the receiving part that the identification or number of the sending buffer of the current message corresponds to the identification or number of the associated receiving buffer, that is, that the output pointer of the sending buffer corresponds to the input pointer of the receiving buffer,
a step for generating a token indicating that a receiving buffer has been cleared and that the latter is now free,
a step for checking that the tokens generated during the clearing of the receiving buffers have been generated cyclically.
According to another characteristic the process comprises
a step for verifying that the receiving buffer intended to receive the current message is free, a message being sent to the receiving part only if the necessary space within it is available.
According to another characteristic, at the initialization of the serial link all the receiving buffers are empty and the input and output pointers of the sending and receiving buffers are at zero.
According to another characteristic, the transmitted information is 9/12 encoded by associating with the normal character, formed by a nine-bit byte, the code whose balance relative to the direct current component is chosen so as to cause the cumulative imbalance to tend to zero, a direct/inverse coding bit, and filling it out to 12 bits with a start character and a stop character.
According to another characteristic, the range within which the accumulated current imbalance of the codes of the message flow must be contained is [+10; −10].
Another object of the invention is to propose a device for implementation of the process.
This object is achieved due to the fact that the device for detecting errors in an integrated circuit comprising a serial link control function for constituting a high-speed serial-parallel communication port between a parallel bus and a serial link, the port comprising, in a sending part, at least one buffer for data to be transmitted issuing from the parallel bus and means for serializing on output, and in a receiving part, at least one buffer for data to be received and means for deserializing on input and means for checking the data of the messages by calculating the cyclic redundancy check (CRC) code on all the data of each message to be transmitted, the sending part comprising means for inserting each message or data set into a frame of control characters that convey information on the messages in question, and means for coding the characters, the receiving part comprising means for isolating the characters of the messages
Autechaud Jean-François
Dionet Christophe
Bull S.A.
Chung Phung M.
Kondracki Edward J.
Miles & Stockbridge P.C.
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