Process for depositing III-V semiconductor layers on a...

Single-crystal – oriented-crystal – and epitaxy growth processes; – Forming from vapor or gaseous state – With decomposition of a precursor

Reexamination Certificate

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C117S084000, C117S088000, C117S089000, C117S090000, C117S094000, C117S097000, C117S106000, C117S952000

Reexamination Certificate

active

07128786

ABSTRACT:
This invention relates to a method for depositing III-V semiconductor layers on a non III-V substrate especially a sapphire, silicon or silicon oxide substrate, or another substrate containing silicon. According to said method, a III-V layer, especially a buffer layer, is deposited on the substrate or on a III-V germination layer, in a process chamber of a reactor containing gaseous starting materials. In order to reduce the defect density of the overgrowth, a masking layer consisting of essentially amorphous material is deposited directly on the III-V germination layer or directly on the substrate, said masking layer partially covering of approximately partially covering the germination layer. The masking layer can be a quasi-monolayer and can consist of various materials.

REFERENCES:
patent: 6153010 (2000-11-01), Kiyoku et al.
patent: 6160833 (2000-12-01), Floyd et al.
patent: 6183555 (2001-02-01), Shibata et al.
patent: 6325850 (2001-12-01), Beaumont et al.
patent: 6468347 (2002-10-01), Motoki et al.
patent: 6570192 (2003-05-01), Davis et al.
patent: 6802902 (2004-10-01), Beaumont et al.
patent: 6841808 (2005-01-01), Shibata et al.
Applied Physics Letters, vol. 71, No. 17, Oct. 27, 1997, Zheleva et al., Dislocation density reduction via lateral epitaxy in selectively grown GaN structures, 3 pages.
Applied Physics Letters, vol. 75, No. 14, Oct. 4, 1999, Chen et al., Dislocation reduction in GaN thin films via lateral overgrowth from trenches, 2 pages.
Applied Physics Letters, vol. 78, No. 6, Feb. 5, 2001, Strittmatter et al., Maskless epitaxial lateral overgrowth of GaN layers on structured Si(111) substrates, 3 pages.

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