Process for controlling the height of a stud intersecting an int

Details Process for controlling the height of a stud intersecting an int Process for controlling the height of a stud intersecting an int

1998-01-06

2000-02-22

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438618, 438631, 438633, 438652, 438666, 438669, 438672, 438700, 438637, H01L 2144

Patent

active

060280042

ABSTRACT:
Electrical interconnection with studs is formed by depositing conductive stud material in contact holes in a dielectric layer; patterning the conductive stud material and removing a shallow portion of the dielectric layer surrounding the stud material; depositing a thin layer of dielectric material over the conductive stud and first dielectric layer; forming a trench in the dielectric layers and over the top of the stud material; and depositing conductive material in the trench.

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patent: 5910020 (1999-06-01), Yamada

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