Process for controlling autodoping during epitaxial silicon depo

Details Process for controlling autodoping during epitaxial silicon depo Process for controlling autodoping during epitaxial silicon depo

1996-08-30

1999-12-28

Kunemund, Robert

Single-crystal, oriented-crystal, and epitaxy growth processes;

Forming from vapor or gaseous state

With decomposition of a precursor

117 95, 117935, 438916, 438902, 438906, 438761, C30B 2516, H01L 2131

Patent

active

060076240

ABSTRACT:
A method for controlling the autodoping during epitaxial silicon deposition. First, the substrate (10) is cleaned to remove any native oxide. After being cleaned, the substrate (10) is transferred to the deposition chamber in an inert or vacuum atmosphere to inhibit the growth of a native oxide on the surface of the wafers. A lower temperature (i.e., 500-850.degree. C.) capping layer (14) is deposited to prevent autodoping. Then, the temperature is increased to the desired deposition temperature and the remainder of the epitaxial layer (18) is deposited.

REFERENCES:
patent: 4579609 (1986-04-01), Reif
patent: 4859626 (1989-08-01), Wise
patent: 4894349 (1990-01-01), Saito
"VLSI Quality Silicon Epitaxial Growth at 850.degree. C.", V.J. Silvestri, K. Nummy, P. Ronsheim, R. Bendernagal, D. Kerr and V. T. Phan; Journal Electrochem. Soc., vol. 137, No. 7, Jul. 1990, pp. 2323-2327.
Symposium B on Photon, Beam and Plasma Assisted Processing Fundamentals and Device Technology of the 1988 E-MRS Spring Conference, Strasbourg, France, May 31-Jun. 2, 1988, vol. 36, ISSN 0169-4332, Applied Surface Science, 1989, Netherlands, pp. 673-680, XP000609298, Regolini J. L. et al., "Characterization of Epitaxial Silicon Layers Made by Reduced Pressure/Temperature CVD."
IBM Technical Disclosure Bulletin, vol. 20, No. 3, Aug. 1977, New York, US, pp. 1083-1084, XP002019125, Anonymous Author, "Prevention of Autodoping During Silicon Epitaxial Deposition", Aug. 1977.

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