Process for control of the shape of the etch front in the etchin

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

438719, H01L 213065

Patent

active

060749547

ABSTRACT:
The present disclosure pertains to our discovery that the use of a particular combination of etchant gases results in the formation of a substantially flat etch front for polysilicon etching applications. In general, the process of the invention is useful for controlling the shape of the etch front during the etchback of polysilicon. Typically, the process comprises isotropically etching the polysilicon using a plasma produced from a plasma source gas comprising a particular combination of reactive species which selectively etch polysilicon. The plasma source gas comprises from about 80% to about 95% by volume of a fluorine-comprising gas, and from about 5% to about 20% by volume of an additive gas selected from a group consisting of a bromine-comprising gas, a chlorine-comprising gas, an iodine-comprising gas, or a combination thereof. One preferred mixture is SF.sub.6, Cl.sub.2 and HBr. A preferred method of the invention, used to perform recess etchback of a polysilicon-filled trench in a substrate, comprises the following steps: a) providing a trench 3 formed in a semiconductor structure, wherein the structure includes a substrate 2, at least one gate dielectric layer 6 overlying a surface of the substrate, and at least one etch barrier layer 8 overlying the gate dielectric layer; b) forming a conformal dielectric film 10 overlying the etch barrier layer and the sidewall and bottom of the trench; c) filling the trench with a layer of polysilicon 12 which overlies the conformal dielectric film; and d) isotropically etching the polysilicon back to a predetermined depth within the trench using a plasma produced from the invention plasma source gas. Also disclosed herein is a method of forming a trench capacitor in a single-crystal silicon substrate, the trench capacitor including a dielectric collar and a buried strap.

REFERENCES:
patent: 4755476 (1988-07-01), Bohm et al.
patent: 4895810 (1990-01-01), Meyer et al.
patent: 5120668 (1992-06-01), Hsu et al.
patent: 5160407 (1992-11-01), Latchford et al.
patent: 5182234 (1993-01-01), Meyer
patent: 5229315 (1993-07-01), Jun et al.
patent: 5256583 (1993-10-01), Hollinger
patent: 5283201 (1994-02-01), Tsang et al.
patent: 5318665 (1994-06-01), Oikawa
patent: 5374584 (1994-12-01), Lee et al.
patent: 5449433 (1995-09-01), Donohoe
patent: 5453156 (1995-09-01), Cher et al.
patent: 5492850 (1996-02-01), Ryou
patent: 5656535 (1997-08-01), Ho et al.
patent: 5731130 (1998-03-01), Tseng
Y. Ye et al., "0.35-Micron and Sub-0.35-Micron Metal Stack Etch in a DPS Chamber--DPS Chamber and Process Characterization", Electrochemical Society Proceedings, vol. 96-12, pp. 222-233 (1996).
Yeom et al., "Polysiliocon Etch Back Plasma Process Using HBr, Cl.sub.2, and SF.sub.6 Gas Mixtures for Deep-Trench Isolation", J. Electrochem. Soc., vol. 139, No. 2, pp. 575-579 (1992).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Process for control of the shape of the etch front in the etchin does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for control of the shape of the etch front in the etchin, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for control of the shape of the etch front in the etchin will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2068483

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.