Method of fabricating a node contact window of DRAM

Details Method of fabricating a node contact window of DRAM Method of fabricating a node contact window of DRAM

1998-11-09

2000-06-13

Utech, Benjamin L.

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

438706, 438712, 438713, 438719, H01L 21311

Patent

active

060749555

ABSTRACT:
A method of fabricating a node contact window. A substrate having devices and a first dielectric layer is provided. Bit lines having spacer are formed on the first dielectric layer and a second is formed on the first dielectric layer. A hard material layer is then formed on the second dielectric layer. An opening is formed within the second dielectric layer to expose the spacer and the first dielectric layer. A polysilicon spacer is then formed on the sidewalls of the opening. A node contact window is formed by etching through the first dielectric layer to expose the substrate.

REFERENCES:
patent: 4873559 (1989-10-01), Shimizu et al.
patent: 5554557 (1996-09-01), Koh
patent: 5688713 (1997-11-01), Linliu et al.

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