Process for chemical mechanical polishing

Details Process for chemical mechanical polishing Process for chemical mechanical polishing

2001-09-28

2003-12-09

Whitehead, Carl (Department: 2813)

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

C438S691000, C451S332000

Reexamination Certificate

active

06660637

ABSTRACT:

TECHNICAL FIELD
This invention relates to manufacturing semiconductors, and more particularly, to reducing asymmetric polishing of a semi-conductive wafer during off-matched chemical mechanical polishing (“CMP”).
BACKGROUND
Manufacturing semiconductors involves a complex, multi-step process. One of the steps in this process includes planarizing a semi-conductive wafer in preparation for other steps, such as lithography.
Typically, manufacturing semiconductors employs chemical mechanical polishing to planarize a wafer. Chemical mechanical polishing is used because it provides a good overall planarizing performance when polishing the wafer.
CMP involves rotating a wafer and a polishing pad at select frequencies and touching the rotating wafer and pad to polish the wafer. A polishing chemical solution may also be applied to facilitate the polishing of the wafer.
One method of CMP, known as off-matched CMP, involves rotating a wafer at a first desired frequency and rotating a polishing pad at a second, unequal frequency. Despite better planarizing qualities (e.g., reducing scratches and other nonconformities on a wafer), off-matched CMP may result in an asymmetric polishing of the wafer.
SUMMARY
The invention relates to chemical mechanical polishing. In one aspect, the invention provides a process for reducing asymmetric polishing of a semi-conductive wafer in off-matched CMP. The process includes rotating a wafer having an alignment mark at a wafer rotation rate and a polishing surface at an off-matched rotation rate. For off-matched CMP, the wafer rotation rate and the off-matched rotation rate are not equal.
The wafer, rotating at the wafer rotation rate, and the polishing surface, rotating at the off-matched rotation rate, touch to polish points on the wafer. The wafer rotation rate and the off-matched rotation rate are then adjusted to achieve an approximately zero averaged rotation rate velocity for each point polished on the wafer with respect to the polishing surface, upon completion of a total polishing time.
In another aspect, the invention includes a wafer having an alignment mark rotating at a wafer rotation rate and a first polishing pad rotating at an off-matched rotation rate. A wafer carrier holds and rotates the wafer at the wafer rotation rate. Again, the wafer rotation rate and the off-matched rotation rate are not equal.
The wafer rotating at the wafer rotation rate and the first polishing pad rotating at the off-matched rotation rate touch to polish points on the wafer. The wafer and the first polishing pad touch for a portion of a total polishing time and then separate. Upon separation, the wafer rotation rate is adjusted to an adjusted wafer rotation rate and a second polishing pad is rotated at an adjusted off-matched rotation rate.
The wafer rotating at the adjusted wafer rotation rate and the second polishing pad rotating at the adjusted off-matched rotation rate touch to polish the plurality of points on the wafer. Together, the adjusted wafer rotation rate and adjusted off-match rotation rate cause an approximately zero averaged rotation rate velocity for each point on the wafer with respect to the rotation of a polishing surface. In this aspect the polishing surface is defined by the rotation of the first pad and the second pad polishing the wafer.
In yet another aspect of the invention, a CMP process for polishing a semi-conductive wafer includes rotating a wafer having an alignment mark at a wafer rotation rate and a polishing surface at an off-matched rotation rate Again, the wafer rotation rate and the off-matched rotation rate are not equal.
The wafer rotating at the wafer rotation rate and the polishing surface rotating at the off-matched rotation rate touch at an initial angle &thgr;
i
with respect to the polishing surface. The position of the wafer rotating at the wafer rotation rate is then adjusted with respect to the polishing surface in a manner to achieve an approximately zero averaged rotation rate velocity for each of the points on the wafer with respect to the polishing surface.
The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims.


REFERENCES:
patent: 6354926 (2002-03-01), Walsh
patent: 6407009 (2002-06-01), You et al.
patent: 2001/0044263 (2001-11-01), Andideh et al.
patent: 2002/0052064 (2002-05-01), Grabbe et al.
patent: 2002/0173249 (2002-11-01), Dyer
patent: 2003/0027424 (2003-02-01), Paik
patent: 2003/0029841 (2003-02-01), Moon

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