Process for checking the quality of the metallization of a...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C324S754090, C324S765010

Reexamination Certificate

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07571399

ABSTRACT:
The invention relates to a process for checking the quality of the metallization of a printed circuit, and also includes the printed circuits produced. According to the invention, the checking process consists in providing a checking circuit (1) comprising n through openings (7-1 . . . 7-6, 8-1 . . . 11-6), called vias, on the one hand provided with an internal peripheral wall clad with a metallized layer (12), and on the other hand electrically connected in series between two electrical terminals (16-18, 20-22), in applying a current of predetermined intensity between the two electrical terminals of the checking circuit (1), in measuring the corresponding voltage difference, and in comparing the measured value with a threshold value representative of the voltage difference obtained for a metallized layer of minimum predetermined thickness deposited on the peripheral wall of each via, so as to validate the printed circuit when the measured value is less than the threshold value.

REFERENCES:
patent: 6094337 (2000-07-01), Ueda et al.
patent: 6493861 (2002-12-01), Li et al.
patent: 2005/0173250 (2005-08-01), Thies et al.

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