Fishing – trapping – and vermin destroying
Patent
1994-02-25
1995-04-25
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437214, 437219, 437220, 437902, 257706, 257707, 257738, 257796, H01L 2144
Patent
active
054098653
ABSTRACT:
A TAB Grid Array (TGA) package is a package for an integrated circuit. A TGA package provides an efficient structure and method to connect a semiconductor die encapsulated in the TGA package to an external printed circuit board (PCB). The TGA package uses a tape automated bonding (TAB) technique to provide a generally flexible dielectric film bearing a pattern of conductive traces radially emanating from a die aperture to connect to an area array of pads arranged on the tape perimeter. The pads of area array of pads are connected to the TAB traces using conventional TAB inner lead bonding techniques, or alternatively, wire bonding methods, with both the semiconductor die and the TAB traces facing down towards the PCB. In one embodiment, the back of a semiconductor die and the TAB tape are attached to a stiffener via suitable bonding agents. The stiffener provides the mechanical rigidity to the package and efficiently removes the dissipated power. By using an encapsulation material, both the semiconductor die and the bonds between the semiconductor die and the TAB tape are protected from the environment. Solder balls are attached on the area array of pads of the TGA package facing down. These same solder balls in turn are used to electrically and mechanically connect the package to the external PCB.
REFERENCES:
patent: 4604644 (1986-08-01), Beckham et al.
patent: 4661192 (1987-04-01), McShane
patent: 4731700 (1988-03-01), Woodward et al.
patent: 4842662 (1989-06-01), Jacobi
patent: 4908086 (1990-03-01), Goodrich et al.
patent: 5045921 (1991-09-01), Lin et al.
patent: 5073521 (1991-12-01), Braden
patent: 5136366 (1992-08-01), Worp et al.
patent: 5175612 (1992-12-01), Long et al.
patent: 5276961 (1994-01-01), Matta et al.
patent: 5280409 (1994-01-01), Selna et al.
patent: 5311060 (1994-05-01), Rostoker et al.
Advanced Semiconductor Assembly Technology
Chaudhuri Olik
Kwok Edward C.
Pham Long
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