Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Reexamination Certificate
2002-07-22
2003-09-23
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
C438S475000, C438S542000, C257S206000, C257S211000
Reexamination Certificate
active
06624052
ABSTRACT:
BACKGROUND
The present invention relates to semiconductor structures, semiconductor devices and methods of making the same.
Dangling bonds at the silicon/silicon oxide interface in semiconductor devices are believed to be the cause of observed non-ideal capacitance-voltage characteristics and reduced channel conductance. Low temperature post-metallization annealing in a hydrogen-containing atmosphere is typically used in the semiconductor device fabrication process, to passivate these dangling bonds. During operation, however, transistor performance can degrade, and this degradation has been correlated to the removal of hydrogen from the silicon/silicon oxide interface, due to collisions between heated carriers and the interface. This degradation in hot carrier lifetime (also referred to as HCl lifetime) is exacerbated by the ever ongoing miniaturization of semiconductor devices, and has become a significant limitation in the further shrinkage of semiconductor devices.
A widely used method for minimizing the degradation of HCl lifetime has been to reduce the peak of the electric field in the transistor by appropriate selection of spacer dimensions, and the implantation of ions to form lightly doped regions between the channel and the corresponding source/drain regions of the transistor. Continued miniaturization is severely limiting the usefulness of these techniques.
Another method is to replace hydrogen with deuterium during annealing, taking advantage of the increased strength of the deuterium-silicon bond as compared with the hydrogen-silicon bond. It has been discovered, however, that deuterium is unable to penetrate through silicon nitride layers, present in many semiconductor devices as etch-stop layers and gate spacers. If the deuterium annealing is carried out prior to the formation of the silicon nitride layers, the high-temperatures necessary to form the silicon nitride layers, as well as the boron-phosphorous spin glass layers conventionally used as interlayer dielectrics (750° C. or more), may cause the deuterium to diffuse out. Attempts to overcome these problems have relied on expensive techniques, such as using deuterated silane and ammonia to form the silicon nitride layers, or dangerous techniques, such as annealing in a 100% deuterium atmosphere.
BRIEF SUMMARY
In a first aspect, the present invention is a method of making a semiconductor structure, including annealing a structure in a deuterium-containing atmosphere. The structure contains a substrate, a gate dielectric on the substrate, a gate on the gate dielectric, an etch-stop layer, on the gate, and an interlayer dielectric on the etch-stop layer.
In a second aspect, the present invention is a semiconductor device, containing a substrate, a gate dielectric on the substrate, a gate on the gate dielectric, and a silicon nitride layer, on the gate. The silicon nitride layer is not enriched with deuterium, and an interface between the gate dielectric and the substrate is deuterium enriched.
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Ramkumar Krishnaswamy
Rathor Manuj
Bery Reneé R
Cypress Semiconductor Corporation
Nelms David
Sonnenschein Nath & Rosenthal
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