Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1997-06-23
2001-08-07
Chaudhuri, Olik (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S638000, C438S640000, C438S739000, C438S743000
Reexamination Certificate
active
06271117
ABSTRACT:
BACKGROUND OF INVENTION
1. Field of the Invention
This invention relates generally to fabricating an interconnect for a semiconductor device and more particularly to the fabrication of a conductive plug having a large landing pad for a semiconductor device.
2. Description of the Prior Art
In the quest to achieve microminiaturization of integrated circuit devices, individual elements have been made very small and the elements have been closely packed. As devices are scaled down in dimension, there is a continuous challenge to produce smaller high density capacitors and connections to the substrate using a minimum number of process steps. For example in the recent past, integrated circuits with half a million transistors were produced with 2 micron line widths. Now, it is not uncommon to produce integrated circuits with several million transistors. As a result, conductive line widths were reduced to below 0.5 microns to attempt to maintain the overall size of integrate circuit chip. In the future, denser circuits will require that these line widths and connections must be made even smaller.
This miniaturization creates problems in photolithography alignment and in forming contacts to the substrate. Generally in the manufacturing of a (e.g., DRAM) cell of a highly integrated semiconductor device, making a storage electrode contact with a silicon substrate is a difficult process because of the precise alignment requirements of the various photolithography masks. Integrated circuit manufacturers have more difficulty aligning one feature to another and controlling tolerances as line widths decrease. For example, the alignment of the base of the bottom electrode (i.e., the plug) to the overlaying metal layer or cylindrical electrode (bottom electrode) is critical. The alignment tolerances should be increased to reduce misalignment errors and yield losses.
Others in the field have striven to solve other problems with interconnections. For example, U.S. Pat. No. 5,374,591 (Haswgawa et al.) shows a method of forming a metal plug where the adhesion layer around the via hole is removed. U.S. Pat. No. 5,459,100(Choi) shows a method of forming metal plugs in different depth holes. The patent uses two different oxide layers and etches a portion of the top oxide layer away. U.S. Pat. No. 5,567,270 (Liu) shows a method of forming plug contact with a larger top portion.
However, there is still a need for an efficient method to form a plug with a large top landing pad area.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method for fabricating a plug (or interconnection) with a nail shaped land pad that can be used to contact the substrate or an underlying conductive layer.
It is an object of the present invention to provide a method for fabricating a plug having a large landing pad for an overlying conductive level of contact thereby reducing misalignment problems.
It is an object of the present invention to provide a method for fabricating a plug having a large landing pad thereby increasing the overlay tolerance of an overlying conductive layer to the plug landing pad.
To accomplish the above objectives, the present invention provides two preferred embodiments for manufacturing a nail shaped landing pad plug. The first embodiment (
FIGS. 1A-4C
) uses two insulating layers with different etch rates. A lateral portion of the top insulating layer
24
is etched to form a mold for the flat large landing pad
36
. The second embodiment (
FIGS. 5-8
) uses one insulating layer that is etched with two etches—(1) isotropic etch and (2) anisotropic etch. The isotropic etch forms a half spherical shaped hole (e.g., bowl shaped) which is used to form the rounded head of the rounded nail shaped landing pad
58
.
The first embodiment for manufacturing a nail shaped plug contact with a large landing pad area comprises:
a) (See
FIG. 1
) forming a first insulating layer
20
composed of an oxide over a contact area on a semiconductor structure;
b) forming a second insulating layer
24
composed of an oxide over the first insulating layer
20
;
c) forming a first photoresist layer
28
over the second insulating layer
24
; the first photoresist layer
28
having a first photoresist opening over the contact area;
d) etching the second insulating layer
24
using an isotropic etch having a selectivity in a range of between about 2:1 and 20:1 between the second insulating layer
24
and the first insulating layer
20
; the isotropic etch removing a width
25
of the second insulating layer in said first photoresist opening
28
A in a range of between about 0.05 and 0.3 &mgr;m;
e) etching the first insulating layer
20
using a dry etch to expose the surface of the substrate
10
;
f) removing the first photoresist layer
28
;
g) depositing a conductive layer
34
composed of polysilicon or a metal over the substrate surface; and
h) etching back or chemical-mechanical polishing the conductive layer
34
thereby forming a nail shaped conductive plug
36
.
The second embodiment of the present invention forms a rounded nail shaped plug using a two step etch. The method of the second embodiment comprises:
(See
FIG. 5
) forming a first insulating layer
40
composed of an oxide over a semiconductor structure;
forming a first photoresist layer
44
over the first insulating layer
40
; the first photoresist layer
28
having a first photoresist opening over the contact area;
performing a first etch on the first insulating layer
40
using an isotropic etch;
performing a second etch the first insulating layer
40
using an anisotropic etch exposing the surface of the substrate
10
; the second etch forming a rounded nail shaped contact hole
26
;
(See
FIG. 6
) removing the first photoresist layer
44
;
(See
FIG. 7
) depositing a conductive layer
54
preferably composed of polysilicon filling rounded nail shaped contact hole rounded nail shaped contact hole
50
(46+48);
planarizing the conductive layer using a chemical-mechanical polish or an etchback process, thereby forming a rounded nail shaped conductive plug
58
.
The present invention provides two embodiments for forming nail shaped landing pads having a large landing pad area. The large landing pad area increases the misalignment tolerances for the overlying metal contact. The two embodiments of the invention are easy to manufacture and low-cost. The invention can be used to form a connection between any two conductive layers (or substrate) with relaxed overlay tolerances.
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Ackerman Stephen B.
Chaudhuri Olik
Eaton Kurt
Saile George O.
Stoffel William J.
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