Process and installation for doping an etched pattern of...

Details Process and installation for doping an etched pattern of... Process and installation for doping an etched pattern of...

2006-01-24

2006-01-24

Smith, Bradley K. (Department: 2891)

Semiconductor device manufacturing: process

Making passive device

Resistor

C438S384000

Reexamination Certificate

active

06989310

ABSTRACT:
A process for selectively doping predetermined resistive elements on an electronic chip is provided. The resistive elements are arranged in a pattern, and there are three phases in the process. The first phase electrically charges selected elements of the pattern. The second phase adds doping atoms to the charged elements as a function of their state of charge. The third phase anneals the electronic chip to cause penetration of the doping agents and to activate them.

REFERENCES:
patent: 5462889 (1995-10-01), Tsukada et al.
patent: 6358809 (2002-03-01), Nobinger et al.
patent: 0167851 (1986-01-01), None
Patent Abstracts of Japan, vol. 017, No. 475 (C-1103), Aug. 30, 1993 & JP 05117088A (Sumitomo Electric Ind. Ltd.), May 14, 1993.
Hutchings, Localized Semiconductor Diffusions Utilizing Local Laser Melting in Doping Atmospheres, Jan. 1974, IBM Technical Disclosure Bulletin, vol. 16, No. 8, Jan. 1, 1974, pp. 2585-2586, XP002246185.

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