Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-06-26
2007-06-26
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
10996344
ABSTRACT:
Circuit elements are operated as a function of a state of at least one change-over signal, in each case with a particular respective clock mode. Timing analysis is carried out by means of a description of the circuit. The description contains information as to whether the change-over signal is a quasi-static signal which does not change during operation of the circuit, and the descriptions for the circuit elements each contain information as to the state of the change-over signal with which the respective circuit element is operated in which clock mode. In the course of the timing analysis of a timing path which contains the circuit elements, the analysis unit checks whether the change-over signal is a quasi-static signal, and, if so, combinations of respective particular clock modes of the circuit elements that presuppose different states of the change-over signal are not taken into account.
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G. Arrigoni et al., “False Path Elimination in Quasi-Static Scheduling”, 7 pgs., Proceedings of the 2002 Design, Automation and Test in Europe Conference and Exhibition, IEEE 2002.
Brinks Hofer Gilson & Lione
Chiang Jack
Infineon - Technologies AG
Levin Naum B
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