Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature
Reexamination Certificate
2000-03-10
2002-05-28
Christianson, Keith (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having substrate registration feature
C700S121000, C156S345420, C029S056500
Reexamination Certificate
active
06395616
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to processes and devices for revealing a surface mark on an integrated circuit base wafer, and more specifically to a process for locally creating an aperture in a metal layer formed on one face of a base wafer.
2. Description of Related Art
During the fabrication of an integrated circuit wafer, layers defining stacks of metal, insulating, and semiconducting regions are successively formed on a silicon base wafer. These regions are defined and produced by a photolithography process during which a pattern layout carried by a mask is projected, and each time this mask has to be placed in a defined position with respect to the wafer. The precision of this positioning determines the alignment precision of the various layers successively formed on the base wafer. With a greater resolution, it is possible to increase the number of regions and the number of integrated components per unit area. However, with a greater resolution, there is a greater need to achieve high precision in aligning and superposing the metal, insulating, and semiconducting regions.
According to a first conventional technique, such alignment is achieved with respect to a pattern of marks etched into the surface of the silicon base wafer. The masks possess a corresponding pattern of marks, and the pattern of marks on the masks is aligned with the pattern of marks on the base wafer using the technique of monochromatic laser interferometry. In order to use this technique of alignment by laser interferometry, it is necessary for the marks on the surface of the silicon base wafer to be optically visible. Thus, apertures have to be successively created in the metal levels above each of the surface marks on the silicon base wafer.
A second conventional technique involves regenerating the alignment marks at each level n of the layers in order to be able to align the corresponding mask to the level n+1. In this technique, use is made of systems for recognizing and analyzing images by CCD arrays or systems for analyzing the light diffracted by the alignment marks produced at each level. This second alignment technique (using regeneration of the marks on the base wafer) produces errors at each level which are successively added together. In addition, because of the planarity of the surface of the metal layer, there is no longer a detectable mark and apertures again have to be locally created in this metal layer by removing metal.
Presently, this photolithographic operation is used to locally and successively produce the apertures in the various metal layers. As it is not necessary for the apertures to be produced very accurately, this lengthy and expensive technique is not practically suitable. More specifically, this technique includes the steps of depositing a resin, exposing through a mask to define the apertures to be produced, removing the resin above the apertures to be produced, etching the apertures in the metal layer, and completely removing the resin layer.
SUMMARY OF THE INVENTION
In view of these drawbacks, it is an object of the present invention to overcome the above-mentioned drawbacks and to provide a process for locally creating apertures more quickly and less expensively.
Another object of the present invention is to provide an apparatus for locally creating apertures that is technically and economically better suited to the desired precision.
One embodiment of the present invention provides a method for locally creating an aperture in a metal layer that is formed above a base wafer having at least one lateral mark provided in its peripheral edge and at least one surface mark provided at a point on its surface. According to the method, coordinates of a starting position of a tool with respect to the peripheral edge and the lateral mark are found, and coordinates of the position of the surface mark with respect to the starting position of the tool are calculated so as to determine a course to be followed by the tool from the starting position to a working position above the surface mark. The tool is moved to the working position and activated so as to etch the metal layer and create the aperture in the metal layer above the surface mark. In a preferred method, the tool is used in the working position to bring a drop of an etchant into contact with the surface of the wafer so as to selectively etch the metal layer. In other methods, an excimer laser or polishing head is used to etch the metal layer.
Another embodiment of the present invention provides a device for locally creating an aperture in a metal layer that is formed above a base wafer having at least one lateral mark provided in its peripheral edge and at least one surface mark provided at a point on its surface. The device includes means for detecting the lateral mark and for detecting at least one point on the peripheral edge of the base wafer so as to set up a reference frame, a tool for etching the metal layer, means for moving the tool with respect to the metal layer, and means for determining a course for the tool and for driving the means for moving so as to place the tool above the surface mark. In one preferred embodiment, the device also includes means for activating the tool so as to etch the metal layer and create the aperture in the metal layer above the surface mark.
Other objects, features, and advantages of the present invention will become apparent from the following detailed description. It should be understood, however, that the detailed description and specific examples, while indicating preferred embodiments of the present invention, are given by way of illustration only and various modifications may naturally be performed without deviating from the present invention.
REFERENCES:
patent: 4720620 (1988-01-01), Arima
patent: 4914601 (1990-04-01), Smyth, Jr.
patent: 5271798 (1993-12-01), Sandhu et al.
patent: 5786260 (1998-07-01), Jang et al.
patent: 6103636 (2000-08-01), Zahorik et al.
patent: 0 482 240 (1992-04-01), None
European Patent Abstract of Japanese Publication No. 63181319 dated Jul. 26, 1988.
European Patent Abstract of Japanese Publication No. 01066091 dated Mar. 13, 1989.
Matsuoka T., et al. “A New Solar Cell Roofing Tile”, Solar Cells, XP000147941, vol. 29, No. 4, pp. 361-368.
French Search Report dated Nov. 9, 1999 with Annex to French Application No. 99-03016.
Panabiere Jean-Pierre
Weill Andre
Bongini Stephen
Christianson Keith
Fleit Kain Gibbons Gutman & Bongini P.L.
Jorgenson Lisa K.
Pert Evan
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