Process and apparatus for cleaning a silicon surface

Cleaning and liquid contact with solids – Processes – For metallic – siliceous – or calcareous basework – including...

Reexamination Certificate

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Details

C134S011000, C134S031000, C216S074000, C216S079000, C438S906000

Reexamination Certificate

active

06494959

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to semiconductor processing and, more particularly, to a process and an apparatus for cleaning silicon surfaces.
BACKGROUND
The fabrication of semiconductor devices on a silicon wafer involves the formation of layers of various electronic materials, such as epitaxial silicon layers, passivation layers, insulation layers, etc., on a silicon surface. The performance of the semiconductor device depends upon the quality of the layers formed, which in turn depends strongly upon the cleanliness of the processing environment and of the underlying silicon surface.
Silicon surfaces are particularly susceptible to native oxide contamination. Native oxides are non-stoichiometric silicon oxides that can form any time a silicon surface is exposed to ambient atmosphere. Such exposure inevitably occurs during the course of device fabrication, for example, when wafers are being loaded into a processing chamber. Because the native oxides form under non-controlled atmospheric conditions, native oxides tend to grow at different rates from wafer to wafer, leading to different device performance depending on the wafer from which the device was formed. Moreover, the presence of native oxides may interfere with the electrical properties of the individual device, resulting in, for example, device noise, degraded performance, or even total failure.
To achieve acceptable semiconductor device yields per wafer and acceptable device performance, the silicon surface must be free of contaminants and impurities such as oxygen and carbon. One method of removing native oxides and other contaminants involves baking the wafer at a high-temperature, for example, greater than 1000° C., immediately prior to the formation or deposition of a layer of electronic material. Typically, this involves baking the wafer in the same chamber in which the subsequent deposition step is performed. Such baking methods, however, generally cannot be used with wafers having devices thereon because most semiconductor devices cannot withstand such high temperatures.
To lower the baking temperature, some cleaning methods introduce a reactive gas, such as SiH
4
or Si
2
H
6
, or GeH
4
, or NF
3
, into the chamber to help remove the native oxide layer and other contaminants. The use of such reactive gases allows the baking temperature to be reduced below 950° C. However, such reactive gases not only attack the native oxide layer, but also other layers and devices on the wafer. The use of such reactive gases can leave residues in the chamber that can contaminate the wafers that are supposed to be cleaned. Some reactive gases also can attack the chamber walls. The chamber will thus require periodic cleaning and maintenance to remove the residues and repair any corrosion incurred during the wafer cleaning process.
SUMMARY OF THE INVENTION
One aspect of the present invention provides a process of cleaning a silicon surface. In one embodiment, the process involves transferring a silicon wafer into a chamber and maintaining the silicon wafer at a process temperature of not greater than about 800° C. and a process pressure of less than about 1 Torr while flowing hydrogen gas across a surface of the silicon wafer.
In another aspect, the present invention provides an apparatus for cleaning a surface of a silicon wafer. In one embodiment, the apparatus includes a housing having therein a chamber defined by surfaces comprised of quartz. A reflector is positioned outside the chamber. A susceptor is positioned within the chamber and configured to accommodate the silicon wafer such that a first surface of the silicon wafer faces the reflector. A heater is configured to radiate heat towards only a second surface of the silicon wafer. An inlet port and a vacuum port are positioned opposite each other such that a gas introduced from the inlet port flows across the first surface of the silicon wafer towards the vacuum port.


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T. Yamazaki et al., “Investigation of Thermal Removal of Native Oxide from Si (100) Surfaces in Hydrogen for Low-Temperature Si CVD Epitaxy”, J. Electrochem Soc., vol. 139, No. 4, Apr. 1992.

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