Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-09-05
2006-09-05
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07103858
ABSTRACT:
A footprint based optimal characterization of intellectual property (IP) for more deterministic physical integration. The physical integration characteristics are based upon IP physical integration at an anchor point in a pre-defined IC platform. IP footprint characteristics are identified as fixed, variable or prioritized to each other, and bounding constraints are defined based on a set of characteristics for the IP, the platform characteristics and IC design requirements. The IP is physically synthesized using the bounding constraints. The synthesized IP is tested and the bounding constraints are iteratively modified until the characteristics of the synthesized IP are optimized/captured.
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Biglow Robert M.
Byrn Jonathan W.
Siek Vuthe
To Tuyen
Whitesell Eric J.
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