Probe structures for testing electrical interconnections to...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Details

C324S761010

Reexamination Certificate

active

06525551

ABSTRACT:

FIELD OF THE INVENTION
The present invention is directed to probe structures for testing of electrical interconnections to integrated circuit devices and other electronic components.
BACKGROUND OF THE INVENTION
Integrated circuit (IC) devices and other electronic components are normally tested to verify the electrical function of the device and certain devices require high temperature burn-in testing to accelerate early life failures of these devices. The interconnection methods used to test IC devices with aluminum bond pads include permanent and disconnectable techniques. The permanent techniques that are typically used include wire bonding to provide a connection from the IC device to a substrate with fan out wiring or a metal lead frame package. The disconnectable techniques include rigid and flexible probes that are used to connect the IC device to a substrate with fan out wiring or directly to the test equipment.
The permanent attachment techniques used for testing integrated circuit devices such as wire bonding to a leadframe of a plastic leaded chip carrier are typically used for devices that have low number of interconnections and the plastic leaded chip carrier package is relatively inexpensive. The device is tested through the wire bonds and leads of the plastic leaded chip carrier and plugged into a test socket. If the integrated circuit device is defective, the device and the plastic leaded chip carrier are discarded.
The most cost effective techniques for testing and burn-in of integrated circuit devices provide a direct interconnection between the aluminum bond pads on the device to a disconnectable probe sockets that is hard wired to the test equipment. Contemporary probes for testing integrated circuits are expensive to fabricate and are easily damaged. The individual probes are typically attached to ring shaped printed circuit board and support cantilevered metal wires extending towards the center of the opening in the circuit board. Each probe wire must be aligned to a contact location on the integrated circuit device to be tested. The probe wires are generally fragile and easily deformed or damaged. This type of probe fixture is typically used for testing integrated circuit devices that have aluminum bond pads along the perimeter of the device. This type of probe cannot be used for testing integrated circuit devices that have high density area array bond pads.
Another technique used for testing IC devices comprises a thin flex circuit with metal bumps and fan out wiring. The bumps are typically formed by photolithographic processes and provide a raised contact for the probe assembly. The bumps are used to contact the flat or recessed aluminum bond pads on the IC device. An elastomer pad is typically used between the back of the flex circuit and a pressure plate or rigid circuit board to provide compliance for the probe interface. This type of probe is limited to flexible film substrate materials that typically have one or two wiring layers.
The size and spacing of the bond pads on IC devices is limited by the minimum size ball bond used for wire bonded devices and the minimum size solder ball used for flip chip devices. On going process and equipment improvements in the industry have provided the capability for consistent formation of smaller ball bonds and smaller solder balls. These improvements in turn allow for smaller bond pads and tighter spacing between bond pads. Bond pad size and spacing on IC devices is also limited by the probe fixture geometry, the probe position tolerance, and probe movement such as wiping or scrubbing action.
As geometries become smaller, the probes become more fragile and easily damaged. Obvious physical damage to a probe fixture can usually be repaired or replaced at a cost. Physical damage that is not obvious can cause the probe fixture to malfunction and potentially damage the IC wafer. Optical inspection of a probe fixture is often necessary to detect problems of this nature.
Probe position accuracy can be optimized by controlling probe formation tolerances and probe placement tolerances. Even with the best probe forming and positioning techniques available today, probe position accuracy can be further effected by residual material stresses, and thermal expansion mismatches. These problems are much more difficult to control and optimize. Probe movement is typically used as a means of penetrating the thin oxide layer found on aluminum bond pads. Probes can be designed to create a wiping or scrubbing action against the surface of the bond pad to scrape through the oxide and make contact with the metal pad. The wiping or scrubbing action is also useful to move tiny dust particles out of the contact interface area. An alternate means of penetrating the thin oxide layer can be realized using a piercing action with multiple pointed contacts. Various techniques such as dendritic plating or plasma arc spraying are available for treating the contact surface of the probes.
SUMMARY OF THE INVENTION
It is the object of the present invention to provide a probe for testing integrated circuit devices.
Another object of the present invention is to provide a probe that is an integral part of the fan out wiring on the test substrate or other printed wiring means to minimize the contact resistance of the probe interface.
A further object of the present invention is to provide a probe that has a raised tip to contact recessed surfaces.
An additional object of the present invention is to provide a probe structure that has an enhanced true position tolerance.
Yet another object of the present invention is to provide a probe structure that has high durability.
Yet a further object of the present invention is to provide a means of preventing plastic deformation in the probe wires.
It is another object of the present invention to provide an apparatus for making electrical contact with a plurality of bond pads on an integrated circuit device comprising: a first fan out substrate having a first surface; the first surface having a plurality of contact locations; a plurality of ball bonds attached to the plurality of contact locations; a plurality of wires extending outward from the ball bonds, away from the first surface on fan out substrate; a metal coating formed on the plurality of wires.
It is another object of the present invention to provide an apparatus wherein the fan out substrate type includes but is not limited to the following: multilayer ceramic substrates with thick film wiring multilayer ceramic substrates with thin film wiring metalized ceramic substrates with thin film wiring epoxy glass laminate substrates with copper wiring silicon substrates with thin film wiring
It is another object of the present invention to provide an apparatus further including a preformed frame or spacer surrounding clusters, groupings, or arrays of the probes.
It is another object of the present invention to provide an apparatus further including a sheet of material having a plurality of holes corresponding to the plurality of probe wires.
It is another object of the present invention to provide an apparatus further including a surface topology on the ends of the plurality of probes wires comprised of a plurality of sharp, pointed projections.
It is another object of the present invention to provide an apparatus further including a plurality of ball shaped contacts on the ends of the plurality of wires.
It is another object of the present invention to provide an apparatus further including a preformed frame or spacer surrounding clusters, groupings, or arrays of the probes.
It is another object of the present invention to provide an apparatus further including a sheet of material having a plurality of holes corresponding to the plurality of probe wires.
It is another object of the present invention to provide an apparatus further including a surface topology on the ends of the plurality of probes wires comprised of a plurality of sharp, pointed projections.
Yet an additional object of the present invention is to provide a means of enhancing the surface fi

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