Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Patent
1996-01-24
1998-12-01
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
216 2, 216 86, 216 99, 324724, 438 18, 438740, H01L 2100
Patent
active
058438440
ABSTRACT:
Insulation films which include a bump formation portion are formed on a semiconductor layer which serves as a thin layer. Metallic wire patterns are formed to fill up the bump formation portion, on the insulation film. The insulation film, the metallic wire pattern and the insulation film are formed in this order on the metallic wire pattern. A bump made of Ni is formed on a lower surface of the bump formation portion of the metallic wire pattern.
REFERENCES:
patent: 4566184 (1986-01-01), Higgins et al.
patent: 4994735 (1991-02-01), Leedy
patent: 5092033 (1992-03-01), Nishiguchi et al.
Matsushita Electric - Industrial Co., Ltd.
Powell William
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