Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1998-10-28
2001-10-23
Brown, Glenn W. (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S754090, C438S461000, C438S611000, C257S735000
Reexamination Certificate
active
06307392
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a probe card that is connected to electrodes or terminals of an electronic component for inspection of the electrical conductivity condition of the electronic component, and more specifically to a probe card that is connected to electrodes or terminals of an electronic component which includes semiconductor devices such as ICs which are mounted with high density for inspection of the conductivity condition or electrical characteristic of the electronic component.
2. Description of Related Art
In the past, the above-noted type of probe or probe card, as indicated for example in Japanese Unexamined Patent Application publication H8-50146, were used to achieve connections to ICs and the like in order to perform an inspection thereof.
As shown in
FIG. 16
, this was fabricated by performing etching of a substrate to form a cantilever beam, polysilicon on the top of this cantilever beam being subjected to anisotropic etching to form a pointed tip thereon, metal being then forming onto the surface thereof to form a probe.
In the past, there was a known method of forming a structure for connection with an electrode, using the transfer method, as indicated, for example, in the Japanese Unexamined Patent Publication (KOKAI) No. 1-98238.
Specifically, as shown in
FIG. 18
, a titanium film
5
and a platinum film
6
are formed on a bump-forming substrate
4
, a resist film
7
being coating thereover, after which plating is done to form a gold bump
3
on the substrate.
Then, as shown in
FIG. 17
, after removing the above-noted resist film
7
, the gold bumps of the bump-formation substrate are positioned with respect to the aluminum electrodes
2
of the semiconductor element
1
, the gold-bump
3
being transferred by means of hot pressing.
Additionally, there is a known inspection apparatus, as indicated in the Japanese Unexamined Patent Publication (KOKAI) No. 7-167912, which uses an anisotropic film for the purpose of achieving an electrical connection with respect to the electrode of an IC or the like.
In this inspection apparatus, a hole is formed in an organic resin film, and this hole is then filled with a metal, so as to form a bump which makes connection to an electrode or a terminal or the like of an electronic component to be inspected.
The first problem with the above-described prior art is that, in order to fabricate a probe card as indicated, for example, in the Japanese Unexamined Patent Publication (KOKAI) No. 8-50146, it is necessary to use a substrate having a specific structure, thereby preventing the use of a printed circuit substrate of a type that is widely used.
The reason for this is that, in order to achieve flexibility in the probe, it is necessary to fabricate a depression in a specific location of the substrate.
That is, because a printed circuit substrate of the type that is generally used does not permit the formation of such a depression, the probe card as indicated in the Japanese Unexamined Patent Publication (KOKAI) No. 8-50146 is limited to the case in which the substrate material is silicon.
The second problem with the prior art is that, with the method of forming a bump as indicated in the Japanese Unexamined Patent Publication (KOKAI) No. 1-98238, the height of the bump is small.
The reason for this is that when the pitch between the formed bumps becomes small, it becomes difficult to form resist. That is, in order to make the bump formation pitch small and achieve a large height, it is necessary to form a resist film having a height corresponding to the height of the bump, so as to form an aperture part that forms the bump.
However, when the resist film thickness becomes great, it is difficult to control the shape of the aperture part.
A third problem involved with prior art is that, in the method of forming a bump as indicated in the Japanese Unexamined Patent Publication (KOKAI) No. 1-98238, it is not possible to form a bump with a pointed tip for use as a probe contact point.
The reason for this is that in forming a bump by the method indicated in the Japanese Unexamined Patent Publication (KOKAI) No. 1-98238, because the bump is formed on a flat substrate, the tip of the transferred bump is flat.
A fourth problem with the prior art is that, in the method of forming a bump as indicated in the Japanese Unexamined Patent Publication (KOKAI) No. 8-50146, it is not possible to form a bump on an arbitrary electrode.
The reason for this is that, when single crystal silicon is formed over the surface onto which an electrode is to be formed, if the electrode surface has poor flatness, it is difficult to apply single crystal silicon over all the electrodes.
An additional reason is the damage to the surface of the substrate onto which a bump is to be performed when performing etching of silicon or an SiO
2
film.
A fifth problem with the prior art is that of high cost, in the case of the method of forming a bump that is indicated in the Japanese Unexamined Patent Publication (KOKAI) No. 8-50146.
The reason for this is that it is only possible to form a bump one time from silicon to be used for bump formation.
A sixth problem in the prior art is that, in the method of forming a bump indicated in the Japanese Unexamined Patent Publication (KOKAI) No. 8-50146, it is difficult to fabricate probes for the testing of LSI devices or other ICs which have electrodes disposed in a matrix arrangement.
The reason for this is that the spacing between electrodes of an IC having electrodes which are disposed in a matrix arrangement is approximately 250 &mgr;m, so that for an IC measuring 10 mm by 10 mm, there would be more than 1000 electrodes, and for an IC measuring 15 mm by 15 mm, there would be more than 3000 electrodes.
To give access to this number of electrodes in two dimensions requires wiring of a density of 50 lines per millimeter.
This corresponds to a wiring pitch of 20 &mgr;m, and even electrodes at the outer periphery of the device, when one considers the existence of electrodes and etched depressions at even the outer periphery of the device, this pitch shrinks even more, making it difficult to achieve wiring access to the outside from a probe.
The seventh problem involved with the prior art is that, with the method of forming a bump indicated in the Japanese Unexamined Patent Publication (KOKAI) No. 1-98238, the number of times a bump-forming substrate is used repeatedly is small.
The reason for this is that, when damage occurs to the platinum film during the manufacturing process, there is no method of repairing the damage.
Accordingly, an object of the present invention is to provide a probe card which improves on the prior art, and enables efficient inspection of the conductivity characteristics or electrical characteristics of electronic components such as ICs, in which a plurality of electronic devices are mounted thereon with high density, and which features a large number of probes that are disposed with high density, each probe having an appropriate degree of flexibility, so that even if the electrodes or connection contacts of the opposing electronic components to be inspected have some degree of deformation or displacement in the up-down direction, a reliable contact is made with each of them, and further to provide a method of manufacturing a probe card with good efficiency and low cost.
SUMMARY OF THE INVENTION
To achieve the above-noted objects, the present invention has the following basic technical constitution.
Specifically, the first aspect of the present invention is a probe card onto a part of a first main surface of which is provided a lead on a part of which a contact terminal being provided and one end part of which is joined to the substrate via a holding part, the lead being disposed along the main surface of the substrate in a condition in which it is peeled away from the main surface. The second aspect of the present invention is a method of forming a probe card comprising steps of, forming onto a lead-formation substrate having a die par
Senba Naoji
Soejima Koji
Brown Glenn W.
NEC Corporation
Young & Thompson
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