Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-11-27
2007-11-27
Whitmore, Stacy (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
10906548
ABSTRACT:
Methods, systems and program products for determining a probability of fault (POF) function using critical defect size maps. Methods for an exact or a sample POF function are provided. Critical area determinations can also be supplied based on the exact or sample POF functions. The invention provides a less computationally complex and storage-intensive methodology.
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Allen Robert J.
Tan Mervyn Y.
Hoffman Warnick & D'Alessandro LLC
International Business Machines - Corporation
Kotulak Richard M.
Whitmore Stacy
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